gic: Move common GIC definitions to shared header

Share definitions between gic_pl390.h and gic_v3.h.

include/arch/arm/arch/machine/gic_common.h

+/*
+ * Copyright 2019, Data61
+ * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
+ * ABN 41 687 119 230.
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(DATA61_GPL)
+ */
+
+#ifndef __ARCH_MACHINE_GIC_COMMON_H
+#define __ARCH_MACHINE_GIC_COMMON_H
+
+#include <stdint.h>
+
+/* Shift positions for GICD_SGIR register */
+#define GICD_SGIR_SGIINTID_SHIFT          0
+#define GICD_SGIR_CPUTARGETLIST_SHIFT     16
+#define GICD_SGIR_TARGETLISTFILTER_SHIFT  24
+
+
+typedef uint16_t interrupt_t;
+typedef uint16_t irq_t;
+
+enum irqNumbers {
+    irqInvalid = (irq_t) - 1
+};
+
+/*
+ * The only sane way to get an GIC IRQ number that can be properly
+ * ACKED later is through the int_ack register. Unfortunately, reading
+ * this register changes the interrupt state to pending so future
+ * reads will not return the same value For this reason, we have a
+ * global variable to store the IRQ number.
+ */
+extern uint32_t active_irq[CONFIG_MAX_NUM_NODES];
+
+static inline void handleSpuriousIRQ(void)
+{
+}
+
+void initIRQController(void);
+
+
+#endif /* __ARCH_MACHINE_GIC_COMMON_H */

include/arch/arm/arch/machine/gic_pl390.h

@@ -23,12 +23,7 @@
 #include <mode/smp/smp.h>
 #include <model/statedata.h>
 
-typedef uint16_t interrupt_t;
-typedef uint16_t irq_t;
-
-enum irqNumbers {
-    irqInvalid = (irq_t) - 1
-};
+#include "gic_common.h"
 
 /* CPU specific IRQ's */
 #define SGI_START         0u
@@ -148,14 +143,6 @@ struct gic_cpu_iface_map {
 
 extern volatile struct gic_dist_map *const gic_dist;
 extern volatile struct gic_cpu_iface_map *const gic_cpuiface;
-/*
- * The only sane way to get an GIC IRQ number that can be properly
- * ACKED later is through the int_ack register. Unfortunately, reading
- * this register changes the interrupt state to pending so future
- * reads will not return the same value For this reason, we have a
- * global variable to store the IRQ number.
- */
-extern uint32_t active_irq[CONFIG_MAX_NUM_NODES];
 
 /* Helpers */
 static inline int is_irq_edge_triggered(irq_t irq)
@@ -235,12 +222,6 @@ static inline void ackInterrupt(irq_t irq)
 
 }
 
-static inline void handleSpuriousIRQ(void)
-{
-}
-
-void initIRQController(void);
-
 #ifdef ENABLE_SMP_SUPPORT
 void ipiBroadcast(irq_t irq, bool_t includeSelfCPU);
 void ipi_send_target(irq_t irq, word_t cpuTargetList);

include/arch/arm/arch/machine/gic_v3.h

@@ -28,12 +28,7 @@
 #include <model/statedata.h>
 #include <armv/machine.h>
 
-typedef uint16_t interrupt_t;
-typedef uint16_t irq_t;
-
-enum irqNumbers {
-    irqInvalid = (irq_t) - 1
-};
+#include "gic_common.h"
 
 /* Special IRQ's */
 #define SPECIAL_IRQ_START 1020u
@@ -182,14 +177,6 @@ struct gic_rdist_sgi_ppi_map {  /* Starting */
 extern volatile struct gic_dist_map *const gic_dist;
 extern volatile struct gic_rdist_map *gic_rdist_map[CONFIG_MAX_NUM_NODES];
 extern volatile struct gic_rdist_sgi_ppi_map *gic_rdist_sgi_ppi_map[CONFIG_MAX_NUM_NODES];
-/*
- * The only sane way to get an GIC IRQ number that can be properly
- * ACKED later is through the int_ack register. Unfortunately, reading
- * this register changes the interrupt state to pending so future
- * reads will not return the same value For this reason, we have a
- * global variable to store the IRQ number.
- */
-extern uint32_t active_irq[CONFIG_MAX_NUM_NODES];
 
 
 static inline bool_t is_sgi(irq_t irq)
@@ -314,12 +301,6 @@ static inline void ackInterrupt(irq_t irq)
 
 }
 
-static inline void handleSpuriousIRQ(void)
-{
-}
-
-void initIRQController(void);
-
 #ifdef ENABLE_SMP_SUPPORT
 void ipiBroadcast(irq_t irq, bool_t includeSelfCPU);
 void ipi_send_target(irq_t irq, word_t cpuTargetList);

src/arch/arm/machine/gic_pl390.c

@@ -24,11 +24,6 @@
 
 #define IRQ_SET_ALL 0xffffffff;
 
-/* Shift positions for GICD_SGIR register */
-#define GICD_SGIR_SGIINTID_SHIFT          0
-#define GICD_SGIR_CPUTARGETLIST_SHIFT     16
-#define GICD_SGIR_TARGETLISTFILTER_SHIFT  24
-
 #ifndef GIC_PL390_DISTRIBUTOR_PPTR
 #error GIC_PL390_DISTRIBUTOR_PPTR must be defined for virtual memory access to the gic distributer
 #else  /* GIC_DISTRIBUTOR_PPTR */

src/arch/arm/machine/gic_v3.c

@@ -22,11 +22,6 @@
 /* Assume 8 cores */
 #define GICR_SIZE           (0x100000)
 
-/* Shift positions for GICD_SGIR register */
-#define GICD_SGIR_SGIINTID_SHIFT          0
-#define GICD_SGIR_CPUTARGETLIST_SHIFT     16
-#define GICD_SGIR_TARGETLISTFILTER_SHIFT  24
-
 #define GIC_DEADLINE_MS 2
 #define GIC_REG_WIDTH   32