Introduces a bitfield defined virq type that is then used to replace
manual bit packing of virtual irqs in the vcpu/vgic LR registers

ARMSectionBits is variable depending on the current virtual addres space
scheme

* move devices to static array in hardware.h
* use one higher level function to map them in.

* move p_reg functions up a level
* move p_reg definitions to hardware.h

* rename physBaseMapping to BASE_OFFSET
* because physBaseMapping was only used explicity in a few places
* move duplicated arm definions up a level
    - PPTR_TOP
    - PADDR_TOP
    - BASE_OFFSET

The prototype will ultimately be removed, but the mismatch is presently
breaking verification.

Inline non-boot irq functions called on the irq path.
This improves performance of interrupt paths through code locality.

Additionally, remove unused functions and use the BIT macro
rather than redefining it.

* commit 'c6247d36':
  SELFOUR-526: Refactor benchmark/debug syscall kernel entry

When hypervisor extensions are not enabled the boot code cannot
actually call vcpu_boot_init as the symbol names do not even
exist. This is fixed be defining macros that expand to nothing

This commit wraps accesses to the vgic in functions that are marked as
DONT_TRANSLATE and uses a global constant (that is determined at boot time)
for the number of LR registers to prevent loops that have undefined bounds

For acronyms seL4 other does CAPS or caps, this changes some functions
that were doing Caps

Move some instances of setThreadState from decode functions into
perform functions

Attempts to create some consistently across other functions that have
VCPU first in the name and also VCPU first in the argument list

All call paths of VGICMaintenance will call schedule and
activeThread themselves. The operation is therefore redundant
here and is confusing for verification

It is preferable for verification to update the information in a cap,
and pass the updated cap to the perform functions, than to pass all
the information and have the perform function update the cap

Due to limitations in certain compilers in reported architecture
support the kernel needs to be compiled (to assembler) with one
architecture and assembled with another architecture.
Unfortunately when generating the kernel_final.s file the
architecture passed for compilation gets inserted as a '.arch'
directive. This directive overrides the architecture later
passed to the assembler.

This commit is an ugly work around that just strips out any
.arch directives from the assembler file

* commit '3ffa58aa':
  Verification: don't translate functions that are re-implemented from assembly to C
  ARM Hyp: Fix fastpath_restore on ARM Hyp and implement slowpath and restore in C
  SELFOUR-526: ARM - Implement slowpath and restore_user_context in C

* commit '9f9bbc5b':
  SELFOUR-418: Allow overriding python executable used with PYTHON env var

Merge pull request #274 in SEL4/sel4 from ~MFERNANDEZ/sel4:8dafd43a-daa8-4d38-ad7e-3ac425d50087 to master

* commit 'd36447b3':
  Mark strncmp as a pure function.
  Fix: Make VISIBLE expand to nothing for Clang.

Merge pull request #294 in SEL4/sel4 from ~SSHERRATT/sel4:6cff0b6e-92d8-4997-a625-e85f9bf709d9 to master

* commit '91718da4':
  Fixed clobbered register in Signal syscall stub

Fixes a bug where previously MODEL_ID() was defined as:
    `#define MODEL_ID(x) ( ((x & 0xf0000) >> 16) + (x & 0xf0) )`

This was incorrect because (1) it didn't take into account the conditional
nature of the extended_model_ID, and (2) it's actually shifting the
extended_model_ID into the low bits and keeping the model_ID in the high bits,
when it should be the other way around.

This patch also introduces a foundation for more sane testing of CPU vendor,
family, model and brand_ID.