This commit adds an alternate build system using CMake that operates indepenently of
the existing Kconfig+Kbuild+make based build system

This brings the standalone configuration for x86-64 in line with what is verified

Some stubs return structs, which will not change, however instead of
long for those that don't return structs they now return a seL4_Error.

There is a separate list of tcbs per core.

- migrate between debug lists when setting affinity
- use the correct core when removing

The VT-x implementation is not going to be verified at the moment, and so the code for
it needs to be hidden from verification, which we do by #ifdef'ing it out if the VT-x
is not enabled. As a result the VT-x configuration depends on a non verification target

The IOMMU implementation is not going to be verified at the moment, and so the code for
it needs to be hidden from verification, which we do by #ifdef'ing it out if the IOMMU
is not enabled. As a result the IOMMU configuration depends on a non verification target

These helpers are generic PCI and are used outside of the iospace code

This brings the standalone configuration for x86-64 in line with what is verified

Changing the register used for the IPC buffer is useful as the standard TLS model for
aarch64 is to use tpidr_el0 for the thread pointer, which we are presently using
for the IPC buffer. This therefore paves the way for implementing proper TLS support
on aarch64.

Since we are not using tpidr_el0 for the IPC buffer we need to save/restore (or at
least clear) this register on thread switch to prevent it being a user channel. Saving
and restoring of it is achieved by ensuring CONFIG_IPC_BUF_TPIDRURW is not set, which
as we are no longer using this strategy this will be the case. To that end as aarch64
only has one IPC buffer strategy this commit makes the choice of IPC buffer strategy
dependeont on aarch32.

99.99% of the time this is what the user will want these set to in every thread, so
we might as well just set the sensible default here. Nothing stops the user overriding
this default later. This change will be unobservable to any existing (non broken) system

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check

This commit implements lazy FP save/restore mechanism, required for user threads
when they use the FPU. The following caveats take place:

* Only support synchronous exceptions. No support for asynchronous ones.
* VFP opcodes are used instead of normal instructions to discard compiler warnings/errors.
* Support is limited to specific ARM subarchitectures we support and tested this commit on.
* Disable the FPU by default if users are not using it to avoid channels.
* FPU support is not verified yet.
* Will not work properly if using a VM that's running besides other VMs/threads that are using the FPU.

Currently we assume CPU IDs to be linear and use HW CPU IDs as indices
to SMP-related arrays/state. This may change in the future (when
cluster-based SoC are supported).

cpuIndexToID converts a CPU index to a bit position in the case of ARM/GIC,
in order to send IPIs.

Previously anything in an autoref block was assumed to reference
a section, which isn't true. Change 'sec' to 'label' and move the
'sec' prefix into the label itself.

Previously if you wrote to TCB of the current thread and
changed the TLS_BASE this would not immediately take
affect, as the kernel only updates this register in
Arch_switchToThread. This change forces Arch_switchToThread
to get called, even if we would switch back to the original
thread.