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Panda
seL4
Commits
35add5ee
Commit
35add5ee
authored
8 years ago
by
Stephen Sherratt
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Updated bootinfo doc for userImagePaging field
parent
fd5246f8
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manual/parts/bootup.tex
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35add5ee
...
...
@@ -99,7 +99,7 @@ of slots in the initial thread's CNode, starting with CPTR \texttt{start} and wi
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
empty
}
&
empty slots (null caps)
\\
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
sharedFrames
}
&
see
\autoref
{
ch:bootup:multikernel
}
\\
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
userImageFrames
}
&
frames containing the userland image
\\
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
userImageP
Ts
}
&
page tables covering the userland image
\\
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
userImageP
aging
}
&
userland-image paging structure caps
\\
\texttt
{
seL4
\_
SlotRegion
}
&
\texttt
{
untyped
}
&
untyped-memory capabilities
\\
\texttt
{
seL4
\_
Word[]
}
&
\texttt
{
untypedPaddrList
}
&
array of untyped-memory physical addresses
\\
\texttt
{
uint8
\_
t[]
}
&
\texttt
{
untypedSizeBitsList
}
&
array of untyped-memory sizes (
$
2
^
n
$
bytes)
\\
...
...
@@ -112,13 +112,19 @@ of slots in the initial thread's CNode, starting with CPTR \texttt{start} and wi
\end{center}
\end{table}
The capabilities in
\texttt
{
userImageFrames
}
and
\texttt
{
userImagePTs
}
are
ordered, i.e.
\
the first capability references the first frame of the
userland image etc. Userland always knows to which virtual addresses its own
The capabilities in
\texttt
{
userImageFrames
}
are
ordered such that the first capability references the first frame of the
userland image and so on.
The capabilities in
\texttt
{
userImagePaging
}
are ordered in descending order
of paging structure size. Within a given paging structure size, capabilities are
ordered by the virtual address at which the corresponding objects are mapped
into the initial thread's address space.
Userland always knows to which virtual addresses its own
code and data is mapped (e.g.
\
in GCC, with the standard linker script, the
symbols
\texttt
{
\_\_
executable
\_
start
}
and
\texttt
{
\_
end
}
are available).
Userland can therefore
infer the virtual address behind each userland frame and pag
e-tabl
e cap.
infer the virtual address behind each userland frame and pag
ing structur
e cap.
Untyped memory is given in no particular order. The array entry
\texttt
{
untypedSizeBitsList[i]
}
stores the untyped-memory size (
$
2
^
n
$
bytes) of
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