kernel: add Intel/Lantiq VRX518 TC driver

This driver version is also included in Intel UGW 8.5.2.10.

Signed-off-by: Martin Schiller <ms.3headeddevs@gmail.com>
[updated for kernel 5.10]
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
[update to 1.5.12.4, switch to tag tarball]
Signed-off-by: Andre Heider <a.heider@gmail.com>
[add working software data path]
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Signed-off-by: Andre Heider <a.heider@gmail.com>

package/kernel/lantiq/vrx518_tc/Makefile

+#
+# Copyright (C) 2019 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=vrx518_tc
+PKG_VERSION:=1.5.12.4
+PKG_RELEASE:=$(AUTORELEASE)
+PKG_BASE_NAME:=vrx518_tc_drv
+
+UGW_VERSION=8.5.2.10
+UGW_BASENAME=$(PKG_BASE_NAME)-ugw_$(UGW_VERSION)
+
+PKG_SOURCE:=$(UGW_BASENAME).tar.bz2
+PKG_SOURCE_URL:=https://gitlab.com/prpl-foundation/intel/$(PKG_BASE_NAME)/-/archive/ugw_$(UGW_VERSION)/
+PKG_HASH:=0c5bb0f9a06dc4cc4bbb8b930d01a673daba1b66615e8328818356d32c8f1548
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(UGW_BASENAME)
+PKG_LICENSE:=GPL-2.0
+PKG_LICENSE_FILES:=LICENSE
+
+include $(INCLUDE_DIR)/package.mk
+
+PLAT_DIR:=dcdp
+PKG_EXTMOD_SUBDIRS:=$(PLAT_DIR)
+
+# TODO this driver depends on the vrx518 ppe firmware, add this dependency if
+# that ever gets a compatible license
+define KernelPackage/$(PKG_NAME)
+  SECTION:=sys
+  CATEGORY:=Kernel modules
+  SUBMENU:=Network Devices
+  TITLE:=VRX518 TC driver
+  KCONFIG:= \
+    CONFIG_ATM_LANE=m \
+    CONFIG_ATM_MPOA=m \
+    CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT=y
+  DEPENDS:=@TARGET_ipq40xx +kmod-vrx518_ep +kmod-crypto-md5 +kmod-atm +kmod-ipoa +br2684ctl
+  AUTOLOAD:=$(call AutoLoad,27,vrx518_tc)
+  FILES:=$(PKG_BUILD_DIR)/$(PLAT_DIR)/$(PKG_NAME).ko
+endef
+
+define KernelPackage/$(PKG_NAME)/description
+  VRX518 TC Driver
+endef
+
+define Build/Prepare
+	$(PKG_UNPACK)
+	# eliminate all carriage returns / convert to unix encoding
+	(cd $(PKG_BUILD_DIR) && find . -type f -exec sed -i 's/\r//g' {} +)
+	$(Build/Patch)
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(1)/usr/include/net/
+	$(CP) $(PKG_BUILD_DIR)/$(PLAT_DIR)/inc/dsl_tc.h $(1)/usr/include/net/
+endef
+
+EXTRA_CFLAGS:= \
+	-I$(STAGING_DIR)/usr/include
+
+define Build/Compile
+	$(KERNEL_MAKE) \
+		M="$(PKG_BUILD_DIR)/$(PLAT_DIR)" \
+		EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
+		FEATURE_VRX518_CPU=y \
+		modules
+endef
+
+$(eval $(call KernelPackage,$(PKG_NAME)))

package/kernel/lantiq/vrx518_tc/patches/201-desc-length.patch

+Port FEATURE_CONF_DESC_LENGTH from the grx500 variant of the driver.
+This also reduces the default length of some descriptors, resulting in
+significantly lower latencies when the line is saturated.
+
+--- a/dcdp/inc/tc_common.h
++++ b/dcdp/inc/tc_common.h
+@@ -27,7 +27,11 @@
+ #define UMT_DEF_PERIOD		400	/* microseconds */
+ 
+ #define MAX_MTU			(DMA_PACKET_SZ - ETH_HLEN - HD_RSRV_SZ)
++#ifdef FEATURE_CONF_DESC_LENGTH
++#define QOSQ_NUM		8
++#else
+ #define QOSQ_NUM		2
++#endif
+ #define FW_STOP_TIMEOUT		20	/* millisecond */
+ #define QOS_DISPATCH_OWN	0
+ #define ACA_TXIN_POLL_INTVAL	10	/* millisecond */
+--- a/dcdp/inc/tc_main.h
++++ b/dcdp/inc/tc_main.h
+@@ -30,6 +30,7 @@
+ #define TCPRIV_ALIGN	32
+ #define DMA_PACKET_SZ	2048
+ 
++#define FEATURE_CONF_DESC_LENGTH 1
+ #define FEATURE_POWER_DOWN 1
+ 
+ enum {
+@@ -157,6 +158,25 @@ struct tc_param {
+ 	unsigned int txout_dnum;
+ 	unsigned int rxin_dnum;
+ 	unsigned int rxout_dnum;
++
++#ifdef FEATURE_CONF_DESC_LENGTH
++	/* __US_FAST_PATH_DES_LIST_NUM:64
++	 * __ACA_TX_IN_PD_LIST_NUM
++	 * __ACA_TX_OUT_PD_LIST_NUM
++	 * */
++	u32 conf_us_fp_desq_len;
++	/*
++	 * Number of queue per QoS queue: QOS_DES_NUM / QOSQ_NUM
++	 * */
++	u32 conf_us_qos_queue_len;
++	/* __US_OUTQ0_DES_LIST_NUM: 32
++	 * __US_OUTQ1_DES_LIST_NUM: 32
++	 * OUTQ_DESC_PER_Q
++	 * */
++	u32 conf_us_outq_len;
++	/**/
++	u32 conf_us_local_q0_desq_len;
++#endif
+ };
+ 
+ struct cdma {
+--- a/dcdp/ptm_tc.c
++++ b/dcdp/ptm_tc.c
+@@ -75,7 +75,11 @@ static const u32 tx_kvec[] = {
+ 	0x30B1B233, 0xB43536B7, 0xB8393ABB, 0x3CBDBE3F,
+ 	0xC04142C3, 0x44C5C647, 0x48C9CA4B, 0xCC4D4ECF
+ };
++#ifndef FEATURE_CONF_DESC_LENGTH
+ static const u32 def_outq_map[OUTQ_PNUM] = {0x1, 0xFE};
++#else
++static const u32 def_outq_map[OUTQ_PNUM] = {0x0, 0xFF};
++#endif
+ static const char ptm_drv_name[] = "PTM SL";
+ static const char ptm_bond_name[][IFNAMSIZ] = {"PTM US BOND", "PTM DS BOND"};
+ 
+@@ -1005,6 +1009,10 @@ static void us_fp_desq_cfg_ctxt_init(str
+ 	int i;
+ 	u32 desc_addr;
+ 	rx_descriptor_t desc;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	struct tc_priv *tc_priv;
++	tc_priv = priv->tc_priv;
++#endif
+ 
+ 	memset(&desq_cfg, 0, sizeof(desq_cfg));
+ 	/* Initialize US Fast-Path Descriptor Queue Config/Context */
+@@ -1012,7 +1020,11 @@ static void us_fp_desq_cfg_ctxt_init(str
+ 	desq_cfg.fast_path	= 1;
+ 	desq_cfg.mbox_int_en	= 0;
+ 	desq_cfg.des_sync_needed = 0;
++#ifndef FEATURE_CONF_DESC_LENGTH
+ 	desq_cfg.des_num	= __US_FAST_PATH_DES_LIST_NUM;
++#else
++	desq_cfg.des_num	= tc_priv->param.conf_us_fp_desq_len;
++#endif
+ 	desq_cfg.des_base_addr	= __US_FAST_PATH_DES_LIST_BASE;
+ 
+ 	tc_mem_write(priv, fpi_addr(__US_FP_INQ_DES_CFG_CTXT),
+@@ -1036,12 +1048,20 @@ static void us_qos_desq_cfg_ctxt_init(st
+ 	int offset, i;
+ 	rx_descriptor_t desc;
+ 	u32 phy_addr;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	struct tc_priv *tc_priv;
++	tc_priv = priv->tc_priv;
++#endif
+ 
+ 	/* Setup QoSQ_CFG_CTXT */
+ 	memset(&qosq_cfg_ctxt, 0, sizeof(qosq_cfg_ctxt));
+ 
+ 	qosq_cfg_ctxt.threshold = 8;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	qosq_cfg_ctxt.des_num	= tc_priv->param.conf_us_qos_queue_len;
++#else
+ 	qosq_cfg_ctxt.des_num	= QOS_DES_NUM / QOSQ_NUM;
++#endif
+ 
+ 	offset = 0;
+ 	for (i = 0; i < QOSQ_NUM; i++) {
+@@ -1080,6 +1100,10 @@ static void us_outq_desq_cfg_ctxt_init(s
+ 	u32 phy_addr;
+ 	int i;
+ 	u32 offset;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	struct tc_priv *tc_priv;
++	tc_priv = priv->tc_priv;
++#endif
+ 
+ 	/* Setup OUTQ_QoS_CFG_CTXT */
+ 	/* NOTE: By default, Shaping & WFQ both are DISABLED!! */
+@@ -1108,7 +1132,11 @@ static void us_outq_desq_cfg_ctxt_init(s
+ 	desq_cfg.des_in_own_val	= US_OUTQ_DES_OWN;
+ 	desq_cfg.mbox_int_en	= 0;
+ 	desq_cfg.des_sync_needed = 0;
+-	desq_cfg.des_num	= 32;
++#ifndef FEATURE_CONF_DESC_LENGTH
++	desq_cfg.des_num	= OUTQ_DESC_PER_Q;
++#else
++	desq_cfg.des_num	= tc_priv->param.conf_us_outq_len;
++#endif
+ 	/**
+ 	* Only BC0 is used in VRX518
+ 	*/
+@@ -1174,7 +1202,11 @@ static void us_qos_cfg_init(struct ptm_e
+ 	/* Set QoS NO DROP */
+ 	sb_w32(1, __QOSQ_NO_DROP);
+ 	/* Enable Preemption function/Disable QoS by default */
++#ifdef FEATURE_CONF_DESC_LENGTH
++	sb_w32(0, _CHK_PREEMP_MAP);
++#else
+ 	sb_w32(1, _CHK_PREEMP_MAP);
++#endif
+ 	/* By default, all qid mappint to non-preemption queue */
+ 	sb_w32(0x0, _QID2PREEMP_MAP);
+ 
+@@ -1376,6 +1408,11 @@ static void ptm_local_desq_cfg_ctxt_init
+ 	u32 dcnt, addr, pdbram_base;
+ 	unsigned int us_des_alloc[] = {
+ 		__US_TC_LOCAL_Q0_DES_LIST_NUM, __US_TC_LOCAL_Q1_DES_LIST_NUM};
++#ifdef FEATURE_CONF_DESC_LENGTH
++	struct tc_priv *tc_priv;
++	tc_priv = priv->tc_priv;
++	us_des_alloc[0] = tc_priv->param.conf_us_local_q0_desq_len;
++#endif
+ 
+ 	/* Setup the Local DESQ Configuration/Context for UpStream Queues */
+ 	memset(&desq_cfg, 0, sizeof(desq_cfg));
+@@ -2321,6 +2358,10 @@ static void ptm_aca_init(struct ptm_ep_p
+ 	u32 phybase = priv->ep->phy_membase;
+ 	u32 start;
+ 	u32 type;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	struct tc_priv *tc_priv;
++	tc_priv = priv->tc_priv;
++#endif
+ 
+ 	priv->tc_priv->tc_ops.soc_cfg_get(&priv->tc_priv->cfg, ptm_id(priv));
+ 	memset(&param, 0, sizeof(param));
+@@ -2334,7 +2375,11 @@ static void ptm_aca_init(struct ptm_ep_p
+ #endif
+ 	txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
+ 	txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
++#ifndef FEATURE_CONF_DESC_LENGTH
+ 	txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
++#else
++	txin->pd_desc_num = tc_priv->param.conf_us_fp_desq_len;
++#endif
+ 	txin->pd_size_in_dw = DESC_DWSZ;
+ 	txin->soc_desc_base = cfg->txin.soc_phydbase;
+ 	txin->soc_desc_num = cfg->txin.soc_dnum;
+--- a/dcdp/tc_main.c
++++ b/dcdp/tc_main.c
+@@ -182,6 +182,12 @@ static inline void init_local_param(stru
+ 	priv->param.txout_dnum = txout_num;
+ 	priv->param.rxin_dnum = rxin_num;
+ 	priv->param.rxout_dnum = rxout_num;
++#ifdef FEATURE_CONF_DESC_LENGTH
++	priv->param.conf_us_fp_desq_len = 32;
++	priv->param.conf_us_qos_queue_len = 32;
++	priv->param.conf_us_outq_len = 32;
++	priv->param.conf_us_local_q0_desq_len = 16;
++#endif
+ 	priv->tc_mode = TC_NONE_MODE;
+ 	priv->tc_stat = NO_TC;
+ 
+--- a/dcdp/tc_proc.c
++++ b/dcdp/tc_proc.c
+@@ -1114,6 +1114,9 @@ static int proc_read_ver(struct seq_file
+ 		(date >> 16) & 0xff,
+ 		(date & 0xffff));
+ 
++#ifdef FEATURE_CONF_DESC_LENGTH
++	seq_puts(seq, " + Support QoS and Configurable descriptor length\n");
++#endif
+ #ifdef FEATURE_POWER_DOWN
+ 	seq_puts(seq, " + Support Power Down enhancement feature\n");
+ #endif
+@@ -1166,6 +1169,113 @@ static const struct proc_ops tc_soc_proc
+ 	.proc_release	= single_release,
+ };
+ 
++#ifdef FEATURE_CONF_DESC_LENGTH
++static ssize_t proc_write_desc_conf(struct file *file, const char __user *buf,
++			size_t count, loff_t *data)
++{
++	struct tc_priv *priv;
++	char str[32];
++	int len, rlen, temp;
++	int num, temp_num;
++	char *param_list[20];
++	len = count < sizeof(str) ? count : sizeof(str) - 1;
++	rlen = len - copy_from_user(str, buf, len);
++	str[rlen] = 0;
++
++	if (!capable(CAP_SYS_ADMIN))
++		return -EPERM;
++
++	priv = (struct tc_priv *)PDE_DATA(file_inode(file));
++	if (priv == NULL)
++		return count;
++
++	num = vrx_split_buffer(str, param_list, ARRAY_SIZE(param_list));
++	if (num < 1 || num > 4)
++		goto proc_dbg_desc_conf;
++
++	temp_num = num;
++	if (num-- != 0) {
++		temp = vrx_atoi(param_list[0]);
++		if (temp < 1 || temp > 128) {
++			pr_info("Fastpath valid range: 1 -> 128\n");
++			goto proc_dbg_desc_conf;
++		}
++	}
++	if (num-- != 0) {
++		temp = vrx_atoi(param_list[1]);
++		if (temp < 1 || temp > 63) {
++			pr_info("QoS valid range: 1 -> 63\n");
++			goto proc_dbg_desc_conf;
++		}
++	}
++	if (num-- != 0) {
++		temp = vrx_atoi(param_list[2]);
++		if (temp < 1 || temp > 128) {
++			pr_info("OutQ valid range: 1 -> 128\n");
++			goto proc_dbg_desc_conf;
++		}
++	}
++	if (num-- != 0) {
++		temp = vrx_atoi(param_list[3]);
++		if (temp < 4 || temp > 16) {
++			pr_info("Local Q0 valid range: 4 -> 16\n");
++			goto proc_dbg_desc_conf;
++		}
++	}
++	num = temp_num;
++	if (num-- != 0) {
++		priv->param.conf_us_fp_desq_len = vrx_atoi(param_list[0]);
++	}
++	if (num-- != 0) {
++		priv->param.conf_us_qos_queue_len = vrx_atoi(param_list[1]);
++	}
++	if (num-- != 0) {
++		priv->param.conf_us_outq_len = vrx_atoi(param_list[2]);
++	}
++	if (num-- != 0) {
++		priv->param.conf_us_local_q0_desq_len = vrx_atoi(param_list[3]);
++	}
++
++	return count;
++
++proc_dbg_desc_conf:
++	pr_info("echo [FP] [QoS] [OutQ] [LocalQ0]> desc_conf\n");
++	return count;
++}
++
++static int proc_read_desc_conf(struct seq_file *seq, void *v)
++{
++	struct tc_priv *priv;
++	priv = (struct tc_priv *)seq->private;
++	if (priv == NULL)
++		return -1;
++	seq_puts(seq, "Upstream descriptor length information:\n");
++	seq_printf(seq, " - Fastpath: %d\n",
++		priv->param.conf_us_fp_desq_len);
++	seq_printf(seq, " - QoS: %d\n",
++		priv->param.conf_us_qos_queue_len);
++	seq_printf(seq, " - OutQ: %d\n",
++		priv->param.conf_us_outq_len);
++	seq_printf(seq, " - Local Q0: %d\n",
++		priv->param.conf_us_local_q0_desq_len);
++	seq_puts(seq, "\n");
++	return 0;
++}
++
++static int proc_read_desc_conf_seq_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, proc_read_desc_conf, PDE_DATA(inode));
++}
++#endif
++
++static const struct proc_ops tc_desc_conf_proc_fops = {
++	.proc_open	= proc_read_desc_conf_seq_open,
++	.proc_read	= seq_read,
++	.proc_write	= proc_write_desc_conf,
++	.proc_lseek	= seq_lseek,
++	.proc_release	= single_release,
++};
++
+ static struct tc_proc_list tc_procs[] = {
+ 	{TC_PROC_DIR,	0,	NULL,			1},
+ 	{"cfg",		0644, &tc_cfg_proc_fops,	0},
+@@ -1174,6 +1284,9 @@ static struct tc_proc_list tc_procs[] =
+ 	{"showtime",	0200, &tc_show_time_proc_fops,	0},
+ 	{"ver",		0644, &tc_ver_proc_fops,	0},
+ 	{"soc",		0644, &tc_soc_proc_fops,	0},
++#ifdef FEATURE_CONF_DESC_LENGTH
++	{"desc_conf",	0644, &tc_desc_conf_proc_fops,	0},
++#endif
+ };
+ 
+ int tc_proc_init(struct tc_priv *priv)
+@@ -1333,7 +1446,6 @@ proc_ptm_cfg_help:
+ 	return count;
+ }
+ 
+-
+ static const struct proc_ops ptm_cfg_proc_fops = {
+ 	.proc_open = proc_read_cfg_seq_open,
+ 	.proc_read = seq_read,

package/kernel/lantiq/vrx518_tc/patches/202-napi.patch

+--- a/dcdp/platform/sw_plat.c
++++ b/dcdp/platform/sw_plat.c
+@@ -208,6 +208,8 @@ struct plat_priv {
+ 	struct tc_req req_work;
+ 	struct aca_ring_grp soc_rings;
+ 	struct net_device *netdev;
++	struct napi_struct *napi_tx;
++	struct napi_struct *napi_rx;
+ 	DECLARE_HASHTABLE(mem_map, 8);
+ };
+ 
+@@ -472,7 +474,7 @@ err2:
+ 	return -1;
+ }
+ 
+-static void txout_action(struct tc_priv *priv, struct aca_ring *txout)
++static int txout_action(struct tc_priv *priv, struct aca_ring *txout, int budget)
+ {
+ 	struct aca_ring *txin = &g_plat_priv->soc_rings.txin;
+ 	struct tx_list *txlist = &g_plat_priv->soc_rings.txlist;
+@@ -490,7 +492,10 @@ static void txout_action(struct tc_priv
+ 		spin_lock_irqsave(&tx_spinlock, flags);
+ 	}
+ 
+-	for (i = 0; i < txout->dnum; i++) {
++	if (budget == 0 || budget > txout->dnum)
++		budget = txout->dnum;
++
++	for (i = 0; i < budget; i++) {
+ 		desc = txout->dbase_mem;
+ 		desc += txout->idx;
+ 
+@@ -540,6 +545,8 @@ static void txout_action(struct tc_priv
+ 	if (cnt && g_plat_priv->netdev && netif_queue_stopped(g_plat_priv->netdev)) {
+ 		netif_wake_queue(g_plat_priv->netdev);
+ 	}
++
++	return cnt;
+ }
+ 
+ static void rxin_action(struct tc_priv *priv,
+@@ -549,7 +556,7 @@ static void rxin_action(struct tc_priv *
+ 	writel(cnt, rxin->umt_dst);
+ }
+ 
+-static int rxout_action(struct tc_priv *priv, struct aca_ring *rxout)
++static int rxout_action(struct tc_priv *priv, struct aca_ring *rxout, int budget)
+ {
+ 	struct device *pdev = priv->ep_dev[0].dev;
+ 	int i, cnt;
+@@ -559,8 +566,11 @@ static int rxout_action(struct tc_priv *
+ 	size_t len;
+ 	struct sk_buff *skb;
+ 
++	if (budget == 0 || budget > rxout->dnum)
++		budget = rxout->dnum;
++
+ 	cnt = 0;
+-	for (i = 0; i < rxout->dnum; i++) {
++	for (i = 0; i < budget; i++) {
+ 		desc = rxout->dbase_mem;
+ 		desc += rxout->idx;
+ 
+@@ -593,14 +603,30 @@ static int rxout_action(struct tc_priv *
+ 		ring_idx_inc(rxout);
+ 	}
+ 
+-	if (!cnt)
+-		tc_err(priv, MSG_RX, "RXOUT spurious interrupt\n");
+-	else
++	if (cnt)
+ 		writel(cnt, rxout->umt_dst+0x28); // RXOUT_HD_ACCUM_SUB instead of RXOUT_HD_ACCUM_ADD
+ 
+ 	return cnt;
+ }
+ 
++static int plat_txout_napi(struct napi_struct *napi, int budget)
++{
++	struct plat_priv *priv = g_plat_priv;
++	struct tc_priv *tcpriv = plat_to_tcpriv();
++	struct aca_ring *txout = &priv->soc_rings.txout;
++	struct dc_ep_dev *ep_dev = &tcpriv->ep_dev[txout->ep_dev_idx];
++	int cnt;
++
++	cnt = txout_action(tcpriv, txout, budget);
++
++	if (cnt < budget) {
++		if (napi_complete_done(napi, cnt))
++			ep_dev->hw_ops->icu_en(ep_dev, ACA_HOSTIF_TX);
++	}
++
++	return cnt;
++}
++
+ static void plat_txout_tasklet(unsigned long arg)
+ {
+ 	struct plat_priv *priv = g_plat_priv;
+@@ -608,12 +634,33 @@ static void plat_txout_tasklet(unsigned
+ 	struct aca_ring *txout = &priv->soc_rings.txout;
+ 	struct dc_ep_dev *ep_dev = &tcpriv->ep_dev[txout->ep_dev_idx];
+ 
+-	txout_action(tcpriv, txout);
++	txout_action(tcpriv, txout, 0);
+ 
+ 	/* Enable interrupt */
+ 	ep_dev->hw_ops->icu_en(ep_dev, ACA_HOSTIF_TX);
+ }
+ 
++static int plat_rxout_napi(struct napi_struct *napi, int budget)
++{
++	struct plat_priv *priv = g_plat_priv;
++	struct tc_priv *tcpriv = plat_to_tcpriv();
++	struct aca_ring *rxout = &priv->soc_rings.rxout;
++	struct aca_ring *rxin = &priv->soc_rings.rxin;
++	struct dc_ep_dev *ep_dev = &tcpriv->ep_dev[rxout->ep_dev_idx];
++	int cnt;
++
++	cnt = rxout_action(tcpriv, rxout, budget);
++	if (cnt)
++		rxin_action(tcpriv, rxin, DMA_PACKET_SZ, cnt);
++
++	if (cnt < budget) {
++		if (napi_complete_done(napi, cnt))
++			ep_dev->hw_ops->icu_en(ep_dev, ACA_HOSTIF_RX);
++	}
++
++	return cnt;
++}
++
+ static void plat_rxout_tasklet(unsigned long arg)
+ {
+ 	struct plat_priv *priv = g_plat_priv;
+@@ -623,7 +670,7 @@ static void plat_rxout_tasklet(unsigned
+ 	struct dc_ep_dev *ep_dev = &tcpriv->ep_dev[rxout->ep_dev_idx];
+ 	int cnt;
+ 
+-	cnt = rxout_action(tcpriv, rxout);
++	cnt = rxout_action(tcpriv, rxout, 0);
+ 	if (cnt)
+ 		rxin_action(tcpriv, rxin, DMA_PACKET_SZ, cnt);
+ 
+@@ -783,11 +830,22 @@ static irqreturn_t aca_rx_irq_handler(in
+ {
+ 	struct dc_ep_dev *ep_dev = dev_id;
+ 
+-	/* Disable IRQ in IMCU */
+-	ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_RX);
++	if (g_plat_priv->napi_rx) {
++
++		if (napi_schedule_prep(g_plat_priv->napi_rx)) {
++			ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_RX);
++			__napi_schedule(g_plat_priv->napi_rx);
++		}
++
++	} else {
++
++		/* Disable IRQ in IMCU */
++		ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_RX);
+ 
+-	/* Start tasklet */
+-	tasklet_schedule(&rxout_task);
++		/* Start tasklet */
++		tasklet_schedule(&rxout_task);
++
++	}
+ 
+ 	return IRQ_HANDLED;
+ }
+@@ -796,15 +854,62 @@ static irqreturn_t aca_tx_irq_handler(in
+ {
+ 	struct dc_ep_dev *ep_dev = dev_id;
+ 
+-	/* Disable IRQ in IMCU */
+-	ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_TX);
++	if (g_plat_priv->napi_tx) {
+ 
+-	/* Start tasklet */
+-	tasklet_schedule(&txout_task);
++		if (napi_schedule_prep(g_plat_priv->napi_tx)) {
++			ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_TX);
++			__napi_schedule(g_plat_priv->napi_tx);
++		}
++
++	} else {
++
++		/* Disable IRQ in IMCU */
++		ep_dev->hw_ops->icu_mask(ep_dev, ACA_HOSTIF_TX);
++
++		/* Start tasklet */
++		tasklet_schedule(&txout_task);
++
++	}
+ 
+ 	return IRQ_HANDLED;
+ }
+ 
++static void plat_net_open(void)
++{
++	struct plat_priv *priv = g_plat_priv;
++	struct tc_priv *tcpriv = plat_to_tcpriv();
++	struct aca_ring *rxout = &priv->soc_rings.rxout;
++	struct aca_ring *txout = &priv->soc_rings.txout;
++	struct dc_ep_dev *ep_dev_rx = &tcpriv->ep_dev[rxout->ep_dev_idx];
++	struct dc_ep_dev *ep_dev_tx = &tcpriv->ep_dev[txout->ep_dev_idx];
++
++	if (priv->napi_rx)
++		napi_enable(priv->napi_rx);
++	ep_dev_rx->hw_ops->icu_en(ep_dev_rx, ACA_HOSTIF_RX);
++
++	if (priv->napi_tx)
++		napi_enable(priv->napi_tx);
++	ep_dev_tx->hw_ops->icu_en(ep_dev_tx, ACA_HOSTIF_TX);
++}
++
++static void plat_net_stop(void)
++{
++	struct plat_priv *priv = g_plat_priv;
++	struct tc_priv *tcpriv = plat_to_tcpriv();
++	struct aca_ring *rxout = &priv->soc_rings.rxout;
++	struct aca_ring *txout = &priv->soc_rings.txout;
++	struct dc_ep_dev *ep_dev_rx = &tcpriv->ep_dev[rxout->ep_dev_idx];
++	struct dc_ep_dev *ep_dev_tx = &tcpriv->ep_dev[txout->ep_dev_idx];
++
++	if (priv->napi_tx)
++		napi_disable(priv->napi_tx);
++	ep_dev_tx->hw_ops->icu_mask(ep_dev_tx, ACA_HOSTIF_TX);
++
++	if (priv->napi_rx)
++		napi_disable(priv->napi_rx);
++	ep_dev_rx->hw_ops->icu_mask(ep_dev_rx, ACA_HOSTIF_RX);
++}
++
+ static void plat_irq_init(struct tc_priv *priv, const char *dev_name)
+ {
+ 	int ret;
+@@ -988,17 +1093,49 @@ static int plat_soc_cfg_get(struct soc_c
+ }
+ 
+ static int plat_open(struct net_device *pdev, const char *dev_name,
++		struct napi_struct *napi_tx, struct napi_struct *napi_rx,
+ 		int id, int flag)
+ {
++	struct tc_priv *priv = g_plat_priv->tc_priv;
++	int i;
++
++	for (i = 0; i < EP_MAX_NUM && i < priv->ep_num; i++) {
++		disable_irq(priv->ep_dev[i].aca_rx_irq);
++		disable_irq(priv->ep_dev[i].aca_tx_irq);
++	}
++
+ 	g_plat_priv->netdev = pdev;
++	g_plat_priv->napi_tx = napi_tx;
++	g_plat_priv->napi_rx = napi_rx;
++
++	for (i = 0; i < EP_MAX_NUM && i < priv->ep_num; i++) {
++		enable_irq(priv->ep_dev[i].aca_rx_irq);
++		enable_irq(priv->ep_dev[i].aca_tx_irq);
++	}
+ 
+ 	return 0;
+ }
+ 
+ static void plat_close(struct net_device *pdev, const char *dev_name,
++		struct napi_struct *napi_tx, struct napi_struct *napi_rx,
+ 		int flag)
+ {
++	struct tc_priv *priv = g_plat_priv->tc_priv;
++	int i;
++
++	for (i = 0; i < EP_MAX_NUM && i < priv->ep_num; i++) {
++		disable_irq(priv->ep_dev[i].aca_rx_irq);
++		disable_irq(priv->ep_dev[i].aca_tx_irq);
++	}
++
+ 	g_plat_priv->netdev = NULL;
++	g_plat_priv->napi_tx = NULL;
++	g_plat_priv->napi_rx = NULL;
++
++	for (i = 0; i < EP_MAX_NUM && i < priv->ep_num; i++) {
++		enable_irq(priv->ep_dev[i].aca_rx_irq);
++		enable_irq(priv->ep_dev[i].aca_tx_irq);
++	}
+ 
+ 	return;
+ }
+@@ -1084,6 +1221,10 @@ static void plat_tc_ops_setup(struct tc_
+ 	priv->tc_ops.free = plat_mem_free;
+ 	priv->tc_ops.dev_reg = plat_open;
+ 	priv->tc_ops.dev_unreg = plat_close;
++	priv->tc_ops.net_open = plat_net_open;
++	priv->tc_ops.net_stop = plat_net_stop;
++	priv->tc_ops.napi_tx = plat_txout_napi;
++	priv->tc_ops.napi_rx = plat_rxout_napi;
+ 	priv->tc_ops.umt_init = plat_umt_init;
+ 	priv->tc_ops.umt_exit = plat_umt_exit;
+ 	priv->tc_ops.umt_start = plat_umt_start;
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
+ static int atm_ring_init(struct atm_priv *priv)
+ {
+ 	atm_aca_ring_config_init(priv);
+-	return priv->tc_priv->tc_ops.dev_reg(NULL, g_atm_dev_name, 0, 0);
++	return priv->tc_priv->tc_ops.dev_reg(NULL, g_atm_dev_name, NULL, NULL, 0, 0);
+ }
+ 
+ static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
+@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
+ 	/* unregister device */
+ 	if (priv->tc_priv->tc_ops.dev_unreg != NULL)
+ 		priv->tc_priv->tc_ops.dev_unreg(NULL,
+-			g_atm_dev_name, 0);
++			g_atm_dev_name, NULL, NULL, 0);
+ 
+ 	/* atm_dev_deinit(priv); */
+ 	/* modem module power off */
+--- a/dcdp/inc/tc_main.h
++++ b/dcdp/inc/tc_main.h
+@@ -209,9 +209,15 @@ struct tc_hw_ops {
+ 	void (*subif_unreg)(struct net_device *pdev, const char *dev_name,
+ 			int subif_id, int flag);
+ 	int (*dev_reg)(struct net_device *pdev, const char *dev_name,
++			struct napi_struct *napi_tx, struct napi_struct *napi_rx,
+ 			int id, int flag);
+ 	void (*dev_unreg)(struct net_device *pdev, const char *dev_name,
++			struct napi_struct *napi_tx, struct napi_struct *napi_rx,
+ 			int flag);
++	void (*net_open)(void);
++	void (*net_stop)(void);
++	int (*napi_tx)(struct napi_struct *napi, int budget);
++	int (*napi_rx)(struct napi_struct *napi, int budget);
+ 
+ 	/*umt init/exit including the corresponding DMA init/exit */
+ 	int (*umt_init)(u32 umt_id, u32 umt_period, u32 umt_dst);
+--- a/dcdp/ptm_tc.c
++++ b/dcdp/ptm_tc.c
+@@ -141,7 +141,11 @@ static int ptm_open(struct net_device *d
+ 	struct ptm_priv *ptm_tc = netdev_priv(dev);
+ 
+ 	tc_info(ptm_tc->tc_priv, MSG_EVENT, "ptm open\n");
++
++	ptm_tc->tc_priv->tc_ops.net_open();
++
+ 	netif_tx_start_all_queues(dev);
++
+ #ifdef CONFIG_SOC_TYPE_XWAY
+ 	xet_phy_wan_port(7, NULL, 1, 1);
+ 	if (ppa_hook_ppa_phys_port_add_fn)
+@@ -158,7 +162,11 @@ static int ptm_stop(struct net_device *d
+ 	struct ptm_priv *ptm_tc = netdev_priv(dev);
+ 
+ 	tc_info(ptm_tc->tc_priv, MSG_EVENT, "ptm stop\n");
++
+ 	netif_tx_stop_all_queues(dev);
++
++	ptm_tc->tc_priv->tc_ops.net_stop();
++
+ #ifdef CONFIG_SOC_TYPE_XWAY
+     if (ppa_drv_datapath_mac_entry_setting)
+         ppa_drv_datapath_mac_entry_setting(dev->dev_addr, 0, 6, 10, 1, 2);
+@@ -555,7 +563,7 @@ static void ptm_rx(struct net_device *de
+ 	ptm_tc->stats64.rx_packets++;
+ 	ptm_tc->stats64.rx_bytes += skb->len;
+ 
+-	if (netif_rx(skb) == NET_RX_DROP)
++	if (netif_receive_skb(skb) == NET_RX_DROP)
+ 		ptm_tc->stats64.rx_dropped++;
+ 
+ 	return;
+@@ -651,6 +659,9 @@ static int ptm_dev_init(struct tc_priv *
+ 	memcpy(ptm_tc->outq_map, def_outq_map, sizeof(def_outq_map));
+ 	SET_NETDEV_DEV(ptm_tc->dev, tc_priv->ep_dev[id].dev);
+ 
++	netif_napi_add(ptm_tc->dev, &ptm_tc->napi_rx, tc_priv->tc_ops.napi_rx, NAPI_POLL_WEIGHT);
++	netif_tx_napi_add(ptm_tc->dev, &ptm_tc->napi_tx, tc_priv->tc_ops.napi_tx, NAPI_POLL_WEIGHT);
++
+ 	err = register_netdev(ptm_tc->dev);
+ 	if (err)
+ 		goto err1;
+@@ -2605,7 +2616,9 @@ static int ptm_ring_init(struct ptm_ep_p
+ {
+ 	ptm_aca_ring_config_init(priv, id, bonding);
+ 	return priv->tc_priv->tc_ops.dev_reg(priv->ptm_tc->dev,
+-		priv->ptm_tc->dev->name, id, bonding);
++		priv->ptm_tc->dev->name,
++		&priv->ptm_tc->napi_tx, &priv->ptm_tc->napi_rx,
++		id, bonding);
+ }
+ 
+ /**
+@@ -2960,7 +2973,9 @@ void ptm_tc_unload(enum dsl_tc_mode tc_m
+ 	/* unregister device */
+ 	if (ptm_tc->tc_priv->tc_ops.dev_unreg != NULL)
+ 		ptm_tc->tc_priv->tc_ops.dev_unreg(ptm_tc->dev,
+-			ptm_tc->dev->name, 0);
++			ptm_tc->dev->name,
++			&priv->ptm_tc->napi_tx, &priv->ptm_tc->napi_rx,
++			0);
+ 
+ 	/* remove PTM callback function */
+ 	ptm_cb_setup(ptm_tc, 0);
+@@ -2978,6 +2993,10 @@ void ptm_exit(void)
+ 
+ 	if (!priv)
+ 		return;
++
++	netif_napi_del(&priv->napi_tx);
++	netif_napi_del(&priv->napi_rx);
++
+ 	unregister_netdev(priv->dev);
+ 	free_netdev(priv->dev);
+ 
+--- a/dcdp/inc/ptm_tc.h
++++ b/dcdp/inc/ptm_tc.h
+@@ -119,6 +119,8 @@ struct ptm_priv {
+ 	u32 ep_id;
+ 	struct ppe_fw fw;
+ 	struct net_device *dev;
++	struct napi_struct napi_tx;
++	struct napi_struct napi_rx;
+ 	spinlock_t ptm_lock;
+ 	struct rtnl_link_stats64 stats64;
+ 	int subif_id;

package/kernel/lantiq/vrx518_tc/patches/203-dbg.patch

+--- a/dcdp/platform/sw_plat.c
++++ b/dcdp/platform/sw_plat.c
+@@ -85,6 +85,7 @@ struct aca_ring {
+ 	u32 dnum;
+ 	u32 dsize;
+ 	int idx; /* SoC RX/TX index */
++	u64 cnt;
+ 	int ep_dev_idx;
+ };
+ 
+@@ -210,6 +211,8 @@ struct plat_priv {
+ 	struct net_device *netdev;
+ 	struct napi_struct *napi_tx;
+ 	struct napi_struct *napi_rx;
++	u64 napi_tx_stats[NAPI_POLL_WEIGHT+1];
++	u64 napi_rx_stats[NAPI_POLL_WEIGHT+1];
+ 	DECLARE_HASHTABLE(mem_map, 8);
+ };
+ 
+@@ -362,6 +365,7 @@ static void txlist_free(struct tx_list *
+ static inline void ring_idx_inc(struct aca_ring *ring)
+ {
+ 	ring->idx = (ring->idx + 1) % ring->dnum;
++	ring->cnt += 1;
+ }
+ 
+ static struct sk_buff *txin_skb_prepare(struct sk_buff *skb)
+@@ -619,6 +623,8 @@ static int plat_txout_napi(struct napi_s
+ 
+ 	cnt = txout_action(tcpriv, txout, budget);
+ 
++	priv->napi_tx_stats[cnt] += 1;
++
+ 	if (cnt < budget) {
+ 		if (napi_complete_done(napi, cnt))
+ 			ep_dev->hw_ops->icu_en(ep_dev, ACA_HOSTIF_TX);
+@@ -653,6 +659,8 @@ static int plat_rxout_napi(struct napi_s
+ 	if (cnt)
+ 		rxin_action(tcpriv, rxin, DMA_PACKET_SZ, cnt);
+ 
++	priv->napi_rx_stats[cnt] += 1;
++
+ 	if (cnt < budget) {
+ 		if (napi_complete_done(napi, cnt))
+ 			ep_dev->hw_ops->icu_en(ep_dev, ACA_HOSTIF_RX);
+@@ -1092,6 +1100,56 @@ static int plat_soc_cfg_get(struct soc_c
+ 	return 0;
+ }
+ 
++static struct proc_dir_entry *g_proc_entry;
++
++static int proc_show(struct seq_file *m, void *p)
++{
++	struct aca_ring *txin = &g_plat_priv->soc_rings.txin;
++	struct aca_ring *txout = &g_plat_priv->soc_rings.txout;
++	struct aca_ring *rxin = &g_plat_priv->soc_rings.rxin;
++	struct aca_ring *rxout = &g_plat_priv->soc_rings.rxout;
++	int i;
++
++	seq_printf(m, "napi_tx_stats: ");
++	for (i = 0; i < sizeof(g_plat_priv->napi_tx_stats) / sizeof(g_plat_priv->napi_tx_stats[0]); i++) {
++		if (i == 0) {
++			seq_printf(m, "%llu", g_plat_priv->napi_tx_stats[i]);
++		} else {
++			seq_printf(m, ", %llu", g_plat_priv->napi_tx_stats[i]);
++		}
++	}
++	seq_printf(m, "\n");
++
++	seq_printf(m, "napi_rx_stats: ");
++	for (i = 0; i < sizeof(g_plat_priv->napi_rx_stats) / sizeof(g_plat_priv->napi_rx_stats[0]); i++) {
++		if (i == 0) {
++			seq_printf(m, "%llu", g_plat_priv->napi_rx_stats[i]);
++		} else {
++			seq_printf(m, ", %llu", g_plat_priv->napi_rx_stats[i]);
++		}
++	}
++	seq_printf(m, "\n");
++
++	seq_printf(m, "txin: %d/%u, %llu\n", txin->idx, txin->dnum, txin->cnt);
++	seq_printf(m, "txout: %d/%u, %llu\n", txout->idx, txout->dnum, txout->cnt);
++	seq_printf(m, "rxin: %d/%u, %llu\n", rxin->idx, rxin->dnum, rxin->cnt);
++	seq_printf(m, "rxout: %d/%u, %llu\n", rxout->idx, rxout->dnum, rxout->cnt);
++
++	return 0;
++}
++
++static int proc_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, proc_show, NULL);
++}
++
++static struct proc_ops proc_operations = {
++        .proc_open    = proc_open,
++        .proc_read    = seq_read,
++        .proc_lseek   = seq_lseek,
++        .proc_release = single_release
++};
++
+ static int plat_open(struct net_device *pdev, const char *dev_name,
+ 		struct napi_struct *napi_tx, struct napi_struct *napi_rx,
+ 		int id, int flag)
+@@ -1099,6 +1157,8 @@ static int plat_open(struct net_device *
+ 	struct tc_priv *priv = g_plat_priv->tc_priv;
+ 	int i;
+ 
++	g_proc_entry = proc_create("swplat", 0600, priv->proc_dir, &proc_operations);
++
+ 	for (i = 0; i < EP_MAX_NUM && i < priv->ep_num; i++) {
+ 		disable_irq(priv->ep_dev[i].aca_rx_irq);
+ 		disable_irq(priv->ep_dev[i].aca_tx_irq);
+@@ -1137,6 +1197,8 @@ static void plat_close(struct net_device
+ 		enable_irq(priv->ep_dev[i].aca_tx_irq);
+ 	}
+ 
++	proc_remove(g_proc_entry);
++
+ 	return;
+ }
+