Skip to content
Snippets Groups Projects
Commit f5ecd8d5 authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

[llvm-mca][x86] Add Generic cpu resource tests

Added a Generic x86 cpu set of resource tests to allow us to check all ISAs.

We currently use SandyBridge as our generic CPU model, but it's better if we actually duplicate these tests for if/when we change the model, it also means we don't end up polluting the SandyBridge folder with tests for ISAs it doesn't support.

llvm-svn: 334853
parent 5e6bc090
No related branches found
No related tags found
No related merge requests found
Showing
with 9413 additions and 0 deletions
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
adcx %ebx, %ecx
adcx (%rbx), %ecx
adcx %rbx, %rcx
adcx (%rbx), %rcx
adox %ebx, %ecx
adox (%rbx), %ecx
adox %rbx, %rcx
adox (%rbx), %rcx
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 2 2 0.67 adcxl %ebx, %ecx
# CHECK-NEXT: 3 7 0.67 * adcxl (%rbx), %ecx
# CHECK-NEXT: 2 2 0.67 adcxq %rbx, %rcx
# CHECK-NEXT: 3 7 0.67 * adcxq (%rbx), %rcx
# CHECK-NEXT: 2 2 0.67 adoxl %ebx, %ecx
# CHECK-NEXT: 3 7 0.67 * adoxl (%rbx), %ecx
# CHECK-NEXT: 2 2 0.67 adoxq %rbx, %rcx
# CHECK-NEXT: 3 7 0.67 * adoxq (%rbx), %rcx
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - 6.67 2.67 - 6.67 2.00 2.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcxl %ebx, %ecx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcxl (%rbx), %ecx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcxq %rbx, %rcx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcxq (%rbx), %rcx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adoxl %ebx, %ecx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adoxl (%rbx), %ecx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adoxq %rbx, %rcx
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adoxq (%rbx), %rcx
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
aesdec %xmm0, %xmm2
aesdec (%rax), %xmm2
aesdeclast %xmm0, %xmm2
aesdeclast (%rax), %xmm2
aesenc %xmm0, %xmm2
aesenc (%rax), %xmm2
aesenclast %xmm0, %xmm2
aesenclast (%rax), %xmm2
aesimc %xmm0, %xmm2
aesimc (%rax), %xmm2
aeskeygenassist $22, %xmm0, %xmm2
aeskeygenassist $22, (%rax), %xmm2
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 2 7 1.00 aesdec %xmm0, %xmm2
# CHECK-NEXT: 3 13 1.00 * aesdec (%rax), %xmm2
# CHECK-NEXT: 2 7 1.00 aesdeclast %xmm0, %xmm2
# CHECK-NEXT: 3 13 1.00 * aesdeclast (%rax), %xmm2
# CHECK-NEXT: 2 7 1.00 aesenc %xmm0, %xmm2
# CHECK-NEXT: 3 13 1.00 * aesenc (%rax), %xmm2
# CHECK-NEXT: 2 7 1.00 aesenclast %xmm0, %xmm2
# CHECK-NEXT: 3 13 1.00 * aesenclast (%rax), %xmm2
# CHECK-NEXT: 2 12 2.00 aesimc %xmm0, %xmm2
# CHECK-NEXT: 3 18 2.00 * aesimc (%rax), %xmm2
# CHECK-NEXT: 1 8 3.67 aeskeygenassist $22, %xmm0, %xmm2
# CHECK-NEXT: 1 8 3.33 * aeskeygenassist $22, (%rax), %xmm2
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - 9.67 9.67 - 21.67 3.00 3.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesdec %xmm0, %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesdec (%rax), %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesdeclast %xmm0, %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesdeclast (%rax), %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesenc %xmm0, %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesenc (%rax), %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesenclast %xmm0, %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesenclast (%rax), %xmm2
# CHECK-NEXT: - - - - - 2.00 - - aesimc %xmm0, %xmm2
# CHECK-NEXT: - - - - - 2.00 0.50 0.50 aesimc (%rax), %xmm2
# CHECK-NEXT: - - 3.67 3.67 - 3.67 - - aeskeygenassist $22, %xmm0, %xmm2
# CHECK-NEXT: - - 3.33 3.33 - 3.33 0.50 0.50 aeskeygenassist $22, (%rax), %xmm2
This diff is collapsed.
This diff is collapsed.
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
andn %eax, %ebx, %ecx
andn (%rax), %ebx, %ecx
andn %rax, %rbx, %rcx
andn (%rax), %rbx, %rcx
bextr %eax, %ebx, %ecx
bextr %eax, (%rbx), %ecx
bextr %rax, %rbx, %rcx
bextr %rax, (%rbx), %rcx
blsi %eax, %ecx
blsi (%rax), %ecx
blsi %rax, %rcx
blsi (%rax), %rcx
blsmsk %eax, %ecx
blsmsk (%rax), %ecx
blsmsk %rax, %rcx
blsmsk (%rax), %rcx
blsr %eax, %ecx
blsr (%rax), %ecx
blsr %rax, %rcx
blsr (%rax), %rcx
tzcnt %eax, %ecx
tzcnt (%rax), %ecx
tzcnt %rax, %rcx
tzcnt (%rax), %rcx
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 1 0.33 andnl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 1 0.33 andnq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx
# CHECK-NEXT: 2 2 1.00 bextrl %eax, %ebx, %ecx
# CHECK-NEXT: 3 7 1.00 * bextrl %eax, (%rbx), %ecx
# CHECK-NEXT: 2 2 1.00 bextrq %rax, %rbx, %rcx
# CHECK-NEXT: 3 7 1.00 * bextrq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 1 0.33 blsil %eax, %ecx
# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx
# CHECK-NEXT: 1 1 0.33 blsiq %rax, %rcx
# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx
# CHECK-NEXT: 1 1 0.33 blsmskl %eax, %ecx
# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx
# CHECK-NEXT: 1 1 0.33 blsmskq %rax, %rcx
# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx
# CHECK-NEXT: 1 1 0.33 blsrl %eax, %ecx
# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx
# CHECK-NEXT: 1 1 0.33 blsrq %rax, %rcx
# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx
# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx
# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx
# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx
# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - 7.33 13.33 - 7.33 6.00 6.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnl (%rax), %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnq (%rax), %rbx, %rcx
# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrl %eax, (%rbx), %ecx
# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrq %rax, (%rbx), %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsil %eax, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsil (%rax), %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsiq %rax, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsiq (%rax), %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskl %eax, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskl (%rax), %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskq %rax, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskq (%rax), %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrl %eax, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrl (%rax), %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrq %rax, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrq (%rax), %rcx
# CHECK-NEXT: - - - 1.00 - - - - tzcntl %eax, %ecx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntl (%rax), %ecx
# CHECK-NEXT: - - - 1.00 - - - - tzcntq %rax, %rcx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntq (%rax), %rcx
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
bzhi %eax, %ebx, %ecx
bzhi %eax, (%rbx), %ecx
bzhi %rax, %rbx, %rcx
bzhi %rax, (%rbx), %rcx
mulx %eax, %ebx, %ecx
mulx (%rax), %ebx, %ecx
mulx %rax, %rbx, %rcx
mulx (%rax), %rbx, %rcx
pdep %eax, %ebx, %ecx
pdep (%rax), %ebx, %ecx
pdep %rax, %rbx, %rcx
pdep (%rax), %rbx, %rcx
pext %eax, %ebx, %ecx
pext (%rax), %ebx, %ecx
pext %rax, %rbx, %rcx
pext (%rax), %rbx, %rcx
rorx $1, %eax, %ecx
rorx $1, (%rax), %ecx
rorx $1, %rax, %rcx
rorx $1, (%rax), %rcx
sarx %eax, %ebx, %ecx
sarx %eax, (%rbx), %ecx
sarx %rax, %rbx, %rcx
sarx %rax, (%rbx), %rcx
shlx %eax, %ebx, %ecx
shlx %eax, (%rbx), %ecx
shlx %rax, %rbx, %rcx
shlx %rax, (%rbx), %rcx
shrx %eax, %ebx, %ecx
shrx %eax, (%rbx), %ecx
shrx %rax, %rbx, %rcx
shrx %rax, (%rbx), %rcx
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 1 1.00 bzhil %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 1.00 * bzhil %eax, (%rbx), %ecx
# CHECK-NEXT: 1 1 1.00 bzhiq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 1.00 * bzhiq %rax, (%rbx), %rcx
# CHECK-NEXT: 2 3 1.00 mulxl %eax, %ebx, %ecx
# CHECK-NEXT: 3 8 1.00 * mulxl (%rax), %ebx, %ecx
# CHECK-NEXT: 2 3 1.00 mulxq %rax, %rbx, %rcx
# CHECK-NEXT: 3 8 1.00 * mulxq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 1 0.33 pdepl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * pdepl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 1 0.33 pdepq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * pdepq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 1 0.33 pextl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * pextl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 1 0.33 pextq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * pextq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx
# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx
# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx
# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx
# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - 10.67 10.67 - 10.67 8.00 8.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - - 1.00 - - - - bzhil %eax, %ebx, %ecx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bzhil %eax, (%rbx), %ecx
# CHECK-NEXT: - - - 1.00 - - - - bzhiq %rax, %rbx, %rcx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bzhiq %rax, (%rbx), %rcx
# CHECK-NEXT: - - - 1.00 - - - - mulxl %eax, %ebx, %ecx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulxl (%rax), %ebx, %ecx
# CHECK-NEXT: - - - 1.00 - - - - mulxq %rax, %rbx, %rcx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulxq (%rax), %rbx, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pdepl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pdepl (%rax), %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pdepq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pdepq (%rax), %rbx, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pextl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pextl (%rax), %ebx, %ecx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pextq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pextq (%rax), %rbx, %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 - - rorxl $1, %eax, %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 rorxl $1, (%rax), %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 - - rorxq $1, %rax, %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 rorxq $1, (%rax), %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 - - sarxl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 sarxl %eax, (%rbx), %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 - - sarxq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 sarxq %rax, (%rbx), %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 - - shlxl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shlxl %eax, (%rbx), %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 - - shlxq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shlxq %rax, (%rbx), %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 - - shrxl %eax, %ebx, %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shrxl %eax, (%rbx), %ecx
# CHECK-NEXT: - - 0.50 - - 0.50 - - shrxq %rax, %rbx, %rcx
# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shrxq %rax, (%rbx), %rcx
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
cmovow %si, %di
cmovnow %si, %di
cmovbw %si, %di
cmovaew %si, %di
cmovew %si, %di
cmovnew %si, %di
cmovbew %si, %di
cmovaw %si, %di
cmovsw %si, %di
cmovnsw %si, %di
cmovpw %si, %di
cmovnpw %si, %di
cmovlw %si, %di
cmovgew %si, %di
cmovlew %si, %di
cmovgw %si, %di
cmovow (%rax), %di
cmovnow (%rax), %di
cmovbw (%rax), %di
cmovaew (%rax), %di
cmovew (%rax), %di
cmovnew (%rax), %di
cmovbew (%rax), %di
cmovaw (%rax), %di
cmovsw (%rax), %di
cmovnsw (%rax), %di
cmovpw (%rax), %di
cmovnpw (%rax), %di
cmovlw (%rax), %di
cmovgew (%rax), %di
cmovlew (%rax), %di
cmovgw (%rax), %di
cmovol %esi, %edi
cmovnol %esi, %edi
cmovbl %esi, %edi
cmovael %esi, %edi
cmovel %esi, %edi
cmovnel %esi, %edi
cmovbel %esi, %edi
cmoval %esi, %edi
cmovsl %esi, %edi
cmovnsl %esi, %edi
cmovpl %esi, %edi
cmovnpl %esi, %edi
cmovll %esi, %edi
cmovgel %esi, %edi
cmovlel %esi, %edi
cmovgl %esi, %edi
cmovol (%rax), %edi
cmovnol (%rax), %edi
cmovbl (%rax), %edi
cmovael (%rax), %edi
cmovel (%rax), %edi
cmovnel (%rax), %edi
cmovbel (%rax), %edi
cmoval (%rax), %edi
cmovsl (%rax), %edi
cmovnsl (%rax), %edi
cmovpl (%rax), %edi
cmovnpl (%rax), %edi
cmovll (%rax), %edi
cmovgel (%rax), %edi
cmovlel (%rax), %edi
cmovgl (%rax), %edi
cmovoq %rsi, %rdi
cmovnoq %rsi, %rdi
cmovbq %rsi, %rdi
cmovaeq %rsi, %rdi
cmoveq %rsi, %rdi
cmovneq %rsi, %rdi
cmovbeq %rsi, %rdi
cmovaq %rsi, %rdi
cmovsq %rsi, %rdi
cmovnsq %rsi, %rdi
cmovpq %rsi, %rdi
cmovnpq %rsi, %rdi
cmovlq %rsi, %rdi
cmovgeq %rsi, %rdi
cmovleq %rsi, %rdi
cmovgq %rsi, %rdi
cmovoq (%rax), %rdi
cmovnoq (%rax), %rdi
cmovbq (%rax), %rdi
cmovaeq (%rax), %rdi
cmoveq (%rax), %rdi
cmovneq (%rax), %rdi
cmovbeq (%rax), %rdi
cmovaq (%rax), %rdi
cmovsq (%rax), %rdi
cmovnsq (%rax), %rdi
cmovpq (%rax), %rdi
cmovnpq (%rax), %rdi
cmovlq (%rax), %rdi
cmovgeq (%rax), %rdi
cmovleq (%rax), %rdi
cmovgq (%rax), %rdi
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 2 2 0.67 cmovow %si, %di
# CHECK-NEXT: 2 2 0.67 cmovnow %si, %di
# CHECK-NEXT: 2 2 0.67 cmovbw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovaew %si, %di
# CHECK-NEXT: 2 2 0.67 cmovew %si, %di
# CHECK-NEXT: 2 2 0.67 cmovnew %si, %di
# CHECK-NEXT: 3 3 1.00 cmovbew %si, %di
# CHECK-NEXT: 3 3 1.00 cmovaw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovsw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovnsw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovpw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovnpw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovlw %si, %di
# CHECK-NEXT: 2 2 0.67 cmovgew %si, %di
# CHECK-NEXT: 2 2 0.67 cmovlew %si, %di
# CHECK-NEXT: 2 2 0.67 cmovgw %si, %di
# CHECK-NEXT: 3 7 0.67 * cmovow (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovnow (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovbw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovaew (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovew (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovnew (%rax), %di
# CHECK-NEXT: 4 8 1.00 * cmovbew (%rax), %di
# CHECK-NEXT: 4 8 1.00 * cmovaw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovsw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovnsw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovpw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovnpw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovlw (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovgew (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovlew (%rax), %di
# CHECK-NEXT: 3 7 0.67 * cmovgw (%rax), %di
# CHECK-NEXT: 2 2 0.67 cmovol %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovnol %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovbl %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovael %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovel %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovnel %esi, %edi
# CHECK-NEXT: 3 3 1.00 cmovbel %esi, %edi
# CHECK-NEXT: 3 3 1.00 cmoval %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovsl %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovnsl %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovpl %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovnpl %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovll %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovgel %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovlel %esi, %edi
# CHECK-NEXT: 2 2 0.67 cmovgl %esi, %edi
# CHECK-NEXT: 3 7 0.67 * cmovol (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovnol (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovbl (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovael (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovel (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovnel (%rax), %edi
# CHECK-NEXT: 4 8 1.00 * cmovbel (%rax), %edi
# CHECK-NEXT: 4 8 1.00 * cmoval (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovsl (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovnsl (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovpl (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovnpl (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovll (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovgel (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovlel (%rax), %edi
# CHECK-NEXT: 3 7 0.67 * cmovgl (%rax), %edi
# CHECK-NEXT: 2 2 0.67 cmovoq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovnoq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovbq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovaeq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmoveq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovneq %rsi, %rdi
# CHECK-NEXT: 3 3 1.00 cmovbeq %rsi, %rdi
# CHECK-NEXT: 3 3 1.00 cmovaq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovsq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovnsq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovpq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovnpq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovlq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovgeq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovleq %rsi, %rdi
# CHECK-NEXT: 2 2 0.67 cmovgq %rsi, %rdi
# CHECK-NEXT: 3 7 0.67 * cmovoq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovnoq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovbq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovaeq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmoveq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovneq (%rax), %rdi
# CHECK-NEXT: 4 8 1.00 * cmovbeq (%rax), %rdi
# CHECK-NEXT: 4 8 1.00 * cmovaq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovsq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovnsq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovpq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovnpq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovlq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovgeq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovleq (%rax), %rdi
# CHECK-NEXT: 3 7 0.67 * cmovgq (%rax), %rdi
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - 86.00 32.00 - 86.00 24.00 24.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovow %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnow %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovaew %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovew %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnew %si, %di
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbew %si, %di
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovaw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgew %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlew %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgw %si, %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovow (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnow (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovaew (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovew (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnew (%rax), %di
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbew (%rax), %di
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovaw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgew (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlew (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgw (%rax), %di
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovol %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnol %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovael %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovel %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnel %esi, %edi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbel %esi, %edi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmoval %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovll %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgel %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlel %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgl %esi, %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovol (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnol (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovael (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovel (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnel (%rax), %edi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbel (%rax), %edi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmoval (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovll (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgel (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlel (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgl (%rax), %edi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovoq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnoq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovaeq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmoveq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovneq %rsi, %rdi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbeq %rsi, %rdi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovaq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgeq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovleq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgq %rsi, %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovoq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnoq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovaeq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmoveq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovneq (%rax), %rdi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbeq (%rax), %rdi
# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovaq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgeq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovleq (%rax), %rdi
# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgq (%rax), %rdi
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
vcvtph2ps %xmm0, %xmm2
vcvtph2ps (%rax), %xmm2
vcvtph2ps %xmm0, %ymm2
vcvtph2ps (%rax), %ymm2
vcvtps2ph $0, %xmm0, %xmm2
vcvtps2ph $0, %xmm0, (%rax)
vcvtps2ph $0, %ymm0, %xmm2
vcvtps2ph $0, %ymm0, (%rax)
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 vcvtph2ps %xmm0, %xmm2
# CHECK-NEXT: 2 8 1.00 * vcvtph2ps (%rax), %xmm2
# CHECK-NEXT: 1 3 1.00 vcvtph2ps %xmm0, %ymm2
# CHECK-NEXT: 2 8 1.00 * vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: 1 3 1.00 vcvtps2ph $0, %xmm0, %xmm2
# CHECK-NEXT: 1 4 1.00 * vcvtps2ph $0, %xmm0, (%rax)
# CHECK-NEXT: 1 3 1.00 vcvtps2ph $0, %ymm0, %xmm2
# CHECK-NEXT: 1 4 1.00 * vcvtps2ph $0, %ymm0, (%rax)
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - - 8.00 2.00 - 2.00 2.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - - 1.00 - - - - vcvtph2ps %xmm0, %xmm2
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtph2ps (%rax), %xmm2
# CHECK-NEXT: - - - 1.00 - - - - vcvtph2ps %xmm0, %ymm2
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: - - - 1.00 - - - - vcvtps2ph $0, %xmm0, %xmm2
# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 vcvtps2ph $0, %xmm0, (%rax)
# CHECK-NEXT: - - - 1.00 - - - - vcvtps2ph $0, %ymm0, %xmm2
# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 vcvtps2ph $0, %ymm0, (%rax)
This diff is collapsed.
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
lzcntw %cx, %cx
lzcntw (%rax), %cx
lzcntl %eax, %ecx
lzcntl (%rax), %ecx
lzcntq %rax, %rcx
lzcntq (%rax), %rcx
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx
# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx
# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx
# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx
# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx
# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx
# CHECK: Resources:
# CHECK-NEXT: [0] - SBDivider
# CHECK-NEXT: [1] - SBFPDivider
# CHECK-NEXT: [2] - SBPort0
# CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: - - - 6.00 - - 1.50 1.50
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - - 1.00 - - - - lzcntw %cx, %cx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntw (%rax), %cx
# CHECK-NEXT: - - - 1.00 - - - - lzcntl %eax, %ecx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntl (%rax), %ecx
# CHECK-NEXT: - - - 1.00 - - - - lzcntq %rax, %rcx
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntq (%rax), %rcx
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment