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Panda
LLVM project
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77cf18fa
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77cf18fa
authored
3 years ago
by
Jessica Paquette
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[MachineOutliner] Add testcase for instruction mapping stats
I forgot to attach the testcase for
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llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
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# RUN: llc -mtriple=aarch64 -run-pass=machine-outliner -verify-machineinstrs -stats %s -o - 2>&1 | FileCheck %s
# REQUIRES: asserts
# Check that instruction mapping stats work.
# We ought to map all of the instructions (5 of them) as legal, and then
# terminate the string with a single illegal character. Debug instructions are
# always invisible, and don't contribute to the length of the string.
# CHECK: 1 machine-outliner - Number of illegal instrs in unsigned vector
# CHECK: 1 machine-outliner - Number of invisible instrs in unsigned vector
# CHECK: 5 machine-outliner - Number of legal instrs in unsigned vector
# CHECK: 6 machine-outliner - Size of unsigned vector
...
---
name: test
tracksRegLiveness: true
machineFunctionInfo:
hasRedZone: false
body: |
bb.0:
liveins: $lr
$x0 = ORRXri $xzr, 1
$x1 = ORRXri $xzr, 1
$x2 = ORRXri $xzr, 1
DBG_VALUE $x3, $noreg
$x3 = ORRXri $xzr, 1
RET undef $lr
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