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[mlir] Width parameterization of BitEnum attributes
This diff contains: - Parameterization of bit enum attributes in OpBase.td by bit width (e.g. 32 and 64). Previously, all enums were 32-bits. This brings enum functionality in line with other integer attributes, and allows for bit enums greater than 32 bits. - SPIRV and Vector dialects were updated to use bit enum attributes with an explicit bit width Reviewed By: mehdi_amini Differential Revision: https://reviews.llvm.org/D123095
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- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td 10 additions, 10 deletionsmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 67 additions, 67 deletionsmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
- mlir/include/mlir/Dialect/Vector/IR/VectorOps.td 13 additions, 13 deletionsmlir/include/mlir/Dialect/Vector/IR/VectorOps.td
- mlir/include/mlir/IR/OpBase.td 86 additions, 36 deletionsmlir/include/mlir/IR/OpBase.td
- mlir/tools/mlir-tblgen/EnumsGen.cpp 2 additions, 2 deletionsmlir/tools/mlir-tblgen/EnumsGen.cpp
- mlir/unittests/TableGen/EnumsGenTest.cpp 2 additions, 0 deletionsmlir/unittests/TableGen/EnumsGenTest.cpp
- mlir/unittests/TableGen/enums.td 25 additions, 19 deletionsmlir/unittests/TableGen/enums.td
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