From fa017b6d453a58e3f110e2bdd5e7b6de85d88d4a Mon Sep 17 00:00:00 2001
From: Anna Lyons <Anna.Lyons@data61.csiro.au>
Date: Mon, 18 Mar 2019 15:46:04 +1100
Subject: [PATCH] Upgrade to astyle 3.1
This produces minor changes
---
include/arch/arm/arch/32/mode/kernel/vspace.h | 2 +-
include/arch/riscv/arch/encoding.h | 4 ++--
src/arch/arm/32/kernel/vspace.c | 2 +-
src/arch/arm/machine/l2c_310.c | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/arch/arm/arch/32/mode/kernel/vspace.h b/include/arch/arm/arch/32/mode/kernel/vspace.h
index 768ff741f..f7619a6da 100644
--- a/include/arch/arm/arch/32/mode/kernel/vspace.h
+++ b/include/arch/arm/arch/32/mode/kernel/vspace.h
@@ -70,7 +70,7 @@ bool_t CONST isIOSpaceFrameCap(cap_t cap);
static const region_t BOOT_RODATA mode_reserved_region[] = {
{
(PD_ASID_SLOT + 0) << ARMSectionBits,
- (PD_ASID_SLOT + 1) << ARMSectionBits
+ (PD_ASID_SLOT + 1) << ARMSectionBits
}
};
diff --git a/include/arch/riscv/arch/encoding.h b/include/arch/riscv/arch/encoding.h
index ddb365e55..1f3465dac 100644
--- a/include/arch/riscv/arch/encoding.h
+++ b/include/arch/riscv/arch/encoding.h
@@ -1001,8 +1001,8 @@ DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
-DECLARE_INSN( or , MATCH_OR, MASK_OR)
-DECLARE_INSN( and , MATCH_AND, MASK_AND)
+DECLARE_INSN( or, MATCH_OR, MASK_OR)
+DECLARE_INSN( and, MATCH_AND, MASK_AND)
DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
diff --git a/src/arch/arm/32/kernel/vspace.c b/src/arch/arm/32/kernel/vspace.c
index 27dc14052..fce95a275 100644
--- a/src/arch/arm/32/kernel/vspace.c
+++ b/src/arch/arm/32/kernel/vspace.c
@@ -2947,7 +2947,7 @@ decodeARMMMUInvocation(word_t invLabel, word_t length, cptr_t cptr,
}
pool = armKSASIDTable[cap_asid_pool_cap_get_capASIDBase(cap) >>
- asidLowBits];
+ asidLowBits];
if (unlikely(!pool)) {
userError("ASIDPoolAssign: Failed to lookup pool.");
current_syscall_error.type = seL4_FailedLookup;
diff --git a/src/arch/arm/machine/l2c_310.c b/src/arch/arm/machine/l2c_310.c
index 6b23461b8..bd06ec971 100644
--- a/src/arch/arm/machine/l2c_310.c
+++ b/src/arch/arm/machine/l2c_310.c
@@ -288,7 +288,7 @@ initL2Cache(void)
/* Access secure registers through Security Middleware Call */
/* 1: Write to aux Tag RAM latentcy, Data RAM latency, prefect, power control registers */
mshield_smc(MSHIELD_SMC_ROM_CTRL_CTRL, 0, 0);
- mshield_smc(MSHIELD_SMC_ROM_CTRL_AUX , aux, 0);
+ mshield_smc(MSHIELD_SMC_ROM_CTRL_AUX, aux, 0);
mshield_smc(MSHIELD_SMC_ROM_CTRL_LATENCY, tag_ram, data_ram);
#else /* !TI_MSHIELD */
--
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