diff --git a/src/drivers/config.cmake b/src/drivers/config.cmake
index 1ffcd69605744e5a7f24727745bcf90a316fbc9c..d83a5e48b99f70b03aa22a2eb3a23cdd736f5fea 100644
--- a/src/drivers/config.cmake
+++ b/src/drivers/config.cmake
@@ -23,3 +23,4 @@ macro(RegisterDriver compatibility_strings match_strings)
endmacro()
include(src/drivers/serial/config.cmake)
+include(src/drivers/timer/config.cmake)
\ No newline at end of file
diff --git a/src/drivers/timer/am335x-timer.c b/src/drivers/timer/am335x-timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..af56cbebaa2cc18202646fe92bb840de1b2a928f
--- /dev/null
+++ b/src/drivers/timer/am335x-timer.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright 2014, General Dynamics C4 Systems
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(GD_GPL)
+ */
+
+#include <config.h>
+#include <types.h>
+#include <machine/io.h>
+#include <kernel/vspace.h>
+#include <arch/machine.h>
+#include <arch/kernel/vspace.h>
+#include <plat/machine.h>
+#include <linker.h>
+#include <plat/machine/devices_gen.h>
+#include <plat/machine/hardware.h>
+#include <plat/machine/timer.h>
+
+#define TIOCP_CFG_SOFTRESET BIT(0)
+
+#define TIER_MATCHENABLE BIT(0)
+#define TIER_OVERFLOWENABLE BIT(1)
+#define TIER_COMPAREENABLE BIT(2)
+
+#define TCLR_AUTORELOAD BIT(1)
+#define TCLR_COMPAREENABLE BIT(6)
+#define TCLR_STARTTIMER BIT(0)
+
+timer_t *timer = (timer_t *) TIMER_PPTR;
+
+#define WDT_REG(base, off) ((volatile uint32_t *)((base) + (off)))
+#define WDT_REG_WWPS 0x34
+#define WDT_REG_WSPR 0x48
+#define WDT_WWPS_PEND_WSPR BIT(4)
+
+static BOOT_CODE void
+disableWatchdog(void)
+{
+ uint32_t wdt = WDT1_PPTR;
+
+ // am335x ref man, sec 20.4.3.8
+ *WDT_REG(wdt, WDT_REG_WSPR) = 0xaaaa;
+ while ((*WDT_REG(wdt, WDT_REG_WWPS) & WDT_WWPS_PEND_WSPR)) {
+ continue;
+ }
+ *WDT_REG(wdt, WDT_REG_WSPR) = 0x5555;
+ while ((*WDT_REG(wdt, WDT_REG_WWPS) & WDT_WWPS_PEND_WSPR)) {
+ continue;
+ }
+}
+
+/*
+ * Enable DMTIMER clocks, otherwise their registers wont be accessible.
+ * This could be moved out of kernel.
+ */
+static BOOT_CODE void
+enableTimers(void)
+{
+ uint32_t cmper = CMPER_PPTR;
+
+ /* XXX repeat this for DMTIMER4..7 */
+ /* select clock */
+ *CMPER_REG(cmper, CMPER_CLKSEL_TIMER3) = CMPER_CKLSEL_MOSC;
+ while ((*CMPER_REG(cmper, CMPER_CLKSEL_TIMER3) & 3) != CMPER_CKLSEL_MOSC) {
+ continue;
+ }
+
+ /* enable clock */
+ *CMPER_REG(cmper, CMPER_TIMER3_CLKCTRL) = CMPER_CLKCTRL_ENABLE;
+ while ((*CMPER_REG(cmper, CMPER_TIMER3_CLKCTRL) & 3) != CMPER_CLKCTRL_ENABLE) {
+ continue;
+ }
+}
+
+/* Configure dmtimer0 as kernel preemption timer */
+BOOT_CODE void
+initTimer(void)
+{
+ int timeout;
+
+ disableWatchdog();
+ enableTimers();
+
+ timer->cfg = TIOCP_CFG_SOFTRESET;
+
+ for (timeout = 10000; (timer->cfg & TIOCP_CFG_SOFTRESET) && timeout > 0; timeout--)
+ ;
+ if (!timeout) {
+ printf("init timer failed\n");
+ return;
+ }
+
+ maskInterrupt(/*disable*/ true, KERNEL_TIMER_IRQ);
+
+ /* Set the reload value */
+ timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD;
+
+ /* Enables interrupt on overflow */
+ timer->tier = TIER_OVERFLOWENABLE;
+
+ /* Clear the read register */
+ timer->tcrr = 0xFFFFFFFFUL - TIMER_RELOAD;
+
+ /* Set autoreload and start the timer */
+ timer->tclr = TCLR_AUTORELOAD | TCLR_STARTTIMER;
+}
diff --git a/src/drivers/timer/config.cmake b/src/drivers/timer/config.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..97816e598d6739194bffc000f87f2fe905f56a95
--- /dev/null
+++ b/src/drivers/timer/config.cmake
@@ -0,0 +1,23 @@
+#
+# Copyright 2019, Data61
+# Commonwealth Scientific and Industrial Research Organisation (CSIRO)
+# ABN 41 687 119 230.
+#
+# This software may be distributed and modified according to the terms of
+# the GNU General Public License version 2. Note that NO WARRANTY is provided.
+# See "LICENSE_GPLv2.txt" for details.
+#
+# @TAG(DATA61_GPL)
+#
+
+cmake_minimum_required(VERSION 3.7.2)
+
+RegisterDriver(compatibility_strings "ti,am335x-timer" PREFIX src/drivers/timer CFILES "am335x-timer.c")
+RegisterDriver(compatibility_strings "qcom,kpss-timer" PREFIX src/drivers/timer CFILES "kpss-timer.c")
+RegisterDriver(compatibility_strings "samsung,exynos4210-mct" PREFIX src/drivers/timer CFILES "exynos4210-mct.c")
+RegisterDriver(compatibility_strings "samsung,exynos4412-mct" PREFIX src/drivers/timer CFILES "exynos4412-mct.c")
+RegisterDriver(compatibility_strings "fsl,imx31-epit" PREFIX src/drivers/timer CFILES "imx31-epit.c")
+RegisterDriver(compatibility_strings "ti,omap3430-timer" PREFIX src/drivers/timer CFILES "omap3430-timer.c")
+RegisterDriver(compatibility_strings "arm,cortex-a9-twd-timer" PREFIX src/drivers/timer CFILES "priv_timer.c")
+RegisterDriver(compatibility_strings "arm,armv7-timer" PREFIX src/drivers/timer CFILES "generic_timer.c")
+RegisterDriver(compatibility_strings "arm,armv8-timer" PREFIX src/drivers/timer CFILES "generic_timer.c")
\ No newline at end of file
diff --git a/src/plat/exynos5/machine/hardware.c b/src/drivers/timer/exynos4210-mct.c
similarity index 100%
rename from src/plat/exynos5/machine/hardware.c
rename to src/drivers/timer/exynos4210-mct.c
diff --git a/src/plat/exynos4/machine/hardware.c b/src/drivers/timer/exynos4412-mct.c
similarity index 100%
rename from src/plat/exynos4/machine/hardware.c
rename to src/drivers/timer/exynos4412-mct.c
diff --git a/src/arch/arm/machine/generic_timer.c b/src/drivers/timer/generic_timer.c
similarity index 100%
rename from src/arch/arm/machine/generic_timer.c
rename to src/drivers/timer/generic_timer.c
diff --git a/src/drivers/timer/imx31-epit.c b/src/drivers/timer/imx31-epit.c
new file mode 100644
index 0000000000000000000000000000000000000000..7229f37b172a8d45abfb51833472c63380e33fa0
--- /dev/null
+++ b/src/drivers/timer/imx31-epit.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright 2014, General Dynamics C4 Systems
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(GD_GPL)
+ */
+
+#include <config.h>
+#include <types.h>
+#include <machine/io.h>
+#include <kernel/vspace.h>
+#include <arch/machine.h>
+#include <arch/kernel/vspace.h>
+#include <plat/machine.h>
+#include <linker.h>
+#include <plat/machine/devices.h>
+#include <plat/machine/devices_gen.h>
+#include <plat/machine/hardware.h>
+#include <plat/machine/timer.h>
+#include <plat/machine/hardware_gen.h>
+#include <arch/benchmark_overflowHandler.h>
+
+#define L2_LINE_SIZE_BITS 5
+#define L2_LINE_SIZE BIT(L2_LINE_SIZE_BITS)
+
+#define L2_LINE_START(a) ROUND_DOWN(a, L2_LINE_SIZE_BITS)
+#define L2_LINE_INDEX(a) (L2_LINE_START(a)>>L2_LINE_SIZE_BITS)
+
+timer_t *epit1 = (timer_t *) EPIT_PPTR;
+
+enum IPGConstants {
+ IPG_CLK = 1,
+ IPG_CLK_HIGHFREQ = 2,
+ IPG_CLK_32K = 3
+};
+
+#define TIMER_CLOCK_SRC IPG_CLK_32K
+
+interrupt_t active_irq = irqInvalid;
+
+/* Configure EPIT1 as kernel preemption timer */
+BOOT_CODE void
+initTimer(void)
+{
+ epitcr_t epitcr_kludge;
+
+ /* Stop timer */
+ epit1->epitcr = 0;
+
+ /* Configure timer */
+ epitcr_kludge.words[0] = 0; /* Zero struct */
+ epitcr_kludge = epitcr_set_clksrc(epitcr_kludge, TIMER_CLOCK_SRC);
+ /* Overwrite counter immediately on write */
+ epitcr_kludge = epitcr_set_iovw(epitcr_kludge, 1);
+ /* Reload from modulus register */
+ epitcr_kludge = epitcr_set_rld(epitcr_kludge, 1);
+ /* Enable interrupt */
+ epitcr_kludge = epitcr_set_ocien(epitcr_kludge, 1);
+ /* Count from modulus value on restart */
+ epitcr_kludge = epitcr_set_enmod(epitcr_kludge, 1);
+ epit1->epitcr = epitcr_kludge.words[0];
+
+ /* Set counter modulus */
+ epit1->epitlr = TIMER_RELOAD;
+
+ /* Interrupt at zero count */
+ epit1->epitcmpr = 0;
+
+ /* Clear pending interrupt */
+ epit1->epitsr = 1;
+
+ /* Enable timer */
+ epitcr_kludge = epitcr_set_en(epitcr_kludge, 1);
+ epit1->epitcr = epitcr_kludge.words[0];
+}
+
diff --git a/src/plat/apq8064/machine/timer.c b/src/drivers/timer/kpss-timer.c
similarity index 100%
rename from src/plat/apq8064/machine/timer.c
rename to src/drivers/timer/kpss-timer.c
diff --git a/src/drivers/timer/omap3430-timer.c b/src/drivers/timer/omap3430-timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..101f0c3e50f65f1971ca61a85cbade62db267f1a
--- /dev/null
+++ b/src/drivers/timer/omap3430-timer.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2014, General Dynamics C4 Systems
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(GD_GPL)
+ */
+
+#include <config.h>
+#include <types.h>
+#include <machine/io.h>
+#include <kernel/vspace.h>
+#include <arch/machine.h>
+#include <arch/kernel/vspace.h>
+#include <plat/machine.h>
+#include <linker.h>
+#include <plat/machine/devices_gen.h>
+#include <plat/machine/hardware.h>
+#include <plat/machine/timer.h>
+
+#define TIMER_INTERVAL_MS (CONFIG_TIMER_TICK_MS)
+
+#define TIOCP_CFG_SOFTRESET BIT(1)
+#define TCLR_AUTORELOAD BIT(1)
+#define TCLR_COMPAREENABLE BIT(6)
+#define TCLR_STARTTIMER BIT(0)
+#define TIER_MATCHENABLE BIT(0)
+#define TIER_OVERFLOWENABLE BIT(1)
+
+timer_t *timer = (timer_t *) TIMER_PPTR;
+
+BOOT_CODE void
+initTimer(void)
+{
+ /* Configure gptimer9 as kernel timer */
+ timer->cfg = TIOCP_CFG_SOFTRESET;
+
+ while (!timer->tistat);
+
+ maskInterrupt(/*disable*/ true, KERNEL_TIMER_IRQ);
+
+ /* Set the reload value */
+ timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD;
+
+ /* Enables interrupt on overflow */
+ timer->tier = TIER_OVERFLOWENABLE;
+
+ /* Clear the read register */
+ timer->tcrr = 0xFFFFFFFFUL - TIMER_RELOAD;
+
+ /* Set autoreload and start the timer */
+ timer->tclr = TCLR_AUTORELOAD | TCLR_STARTTIMER;
+}
diff --git a/src/arch/arm/machine/priv_timer.c b/src/drivers/timer/priv_timer.c
similarity index 100%
rename from src/arch/arm/machine/priv_timer.c
rename to src/drivers/timer/priv_timer.c
diff --git a/src/plat/am335x/machine/hardware.c b/src/plat/am335x/machine/hardware.c
index 264408eafcc1ffb4e1603e1bda3096d2a217e10c..5d680e9803342be4478a715d3523994d6e5b976a 100644
--- a/src/plat/am335x/machine/hardware.c
+++ b/src/plat/am335x/machine/hardware.c
@@ -20,95 +20,6 @@
#include <plat/machine/hardware.h>
#include <plat/machine/timer.h>
-#define TIOCP_CFG_SOFTRESET BIT(0)
-
-#define TIER_MATCHENABLE BIT(0)
-#define TIER_OVERFLOWENABLE BIT(1)
-#define TIER_COMPAREENABLE BIT(2)
-
-#define TCLR_AUTORELOAD BIT(1)
-#define TCLR_COMPAREENABLE BIT(6)
-#define TCLR_STARTTIMER BIT(0)
-
-timer_t *timer = (timer_t *) TIMER_PPTR;
-
-#define WDT_REG(base, off) ((volatile uint32_t *)((base) + (off)))
-#define WDT_REG_WWPS 0x34
-#define WDT_REG_WSPR 0x48
-#define WDT_WWPS_PEND_WSPR BIT(4)
-
-static BOOT_CODE void
-disableWatchdog(void)
-{
- uint32_t wdt = WDT1_PPTR;
-
- // am335x ref man, sec 20.4.3.8
- *WDT_REG(wdt, WDT_REG_WSPR) = 0xaaaa;
- while ((*WDT_REG(wdt, WDT_REG_WWPS) & WDT_WWPS_PEND_WSPR)) {
- continue;
- }
- *WDT_REG(wdt, WDT_REG_WSPR) = 0x5555;
- while ((*WDT_REG(wdt, WDT_REG_WWPS) & WDT_WWPS_PEND_WSPR)) {
- continue;
- }
-}
-
-/*
- * Enable DMTIMER clocks, otherwise their registers wont be accessible.
- * This could be moved out of kernel.
- */
-static BOOT_CODE void
-enableTimers(void)
-{
- uint32_t cmper = CMPER_PPTR;
-
- /* XXX repeat this for DMTIMER4..7 */
- /* select clock */
- *CMPER_REG(cmper, CMPER_CLKSEL_TIMER3) = CMPER_CKLSEL_MOSC;
- while ((*CMPER_REG(cmper, CMPER_CLKSEL_TIMER3) & 3) != CMPER_CKLSEL_MOSC) {
- continue;
- }
-
- /* enable clock */
- *CMPER_REG(cmper, CMPER_TIMER3_CLKCTRL) = CMPER_CLKCTRL_ENABLE;
- while ((*CMPER_REG(cmper, CMPER_TIMER3_CLKCTRL) & 3) != CMPER_CLKCTRL_ENABLE) {
- continue;
- }
-}
-
-/* Configure dmtimer0 as kernel preemption timer */
-BOOT_CODE void
-initTimer(void)
-{
- int timeout;
-
- disableWatchdog();
- enableTimers();
-
- timer->cfg = TIOCP_CFG_SOFTRESET;
-
- for (timeout = 10000; (timer->cfg & TIOCP_CFG_SOFTRESET) && timeout > 0; timeout--)
- ;
- if (!timeout) {
- printf("init timer failed\n");
- return;
- }
-
- maskInterrupt(/*disable*/ true, KERNEL_TIMER_IRQ);
-
- /* Set the reload value */
- timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD;
-
- /* Enables interrupt on overflow */
- timer->tier = TIER_OVERFLOWENABLE;
-
- /* Clear the read register */
- timer->tcrr = 0xFFFFFFFFUL - TIMER_RELOAD;
-
- /* Set autoreload and start the timer */
- timer->tclr = TCLR_AUTORELOAD | TCLR_STARTTIMER;
-}
-
BOOT_CODE void
initIRQController(void)
{
diff --git a/src/plat/apq8064/config.cmake b/src/plat/apq8064/config.cmake
index 74e31b25bda46fb1581355b9ed8eb01722a9d248..410c1a959b121061c813cd5c7926df2fd3e20f98 100644
--- a/src/plat/apq8064/config.cmake
+++ b/src/plat/apq8064/config.cmake
@@ -24,7 +24,6 @@ endif()
add_sources(
DEP "KernelPlatformAPQ8064"
CFILES
- src/plat/apq8064/machine/timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/bcm2837/config.cmake b/src/plat/bcm2837/config.cmake
index c64844112e130e7c5945f30832e569613881a6b6..95887e9420977bd7f5810cdb78328ccd72540bd7 100644
--- a/src/plat/bcm2837/config.cmake
+++ b/src/plat/bcm2837/config.cmake
@@ -28,6 +28,5 @@ add_sources(
DEP "KernelPlatformRpi3"
CFILES
src/plat/bcm2837/machine/intc.c
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/exynos4/config.cmake b/src/plat/exynos4/config.cmake
index 63fcfbc8a7647e4ddbefaf8116cd0bdbfa407f89..e633bfea9260239e3524ba524c96bb7bda079722 100644
--- a/src/plat/exynos4/config.cmake
+++ b/src/plat/exynos4/config.cmake
@@ -23,7 +23,6 @@ endif()
add_sources(
DEP "KernelPlatformExynos4"
CFILES
- src/plat/exynos4/machine/hardware.c
src/arch/arm/machine/l2c_310.c
src/arch/arm/machine/gic_pl390.c
)
diff --git a/src/plat/exynos5/config.cmake b/src/plat/exynos5/config.cmake
index 685123a8108183d27a0883f3406668f029385e97..4ef0d266898e4648bf2373ccb6af880c9c20e7b4 100644
--- a/src/plat/exynos5/config.cmake
+++ b/src/plat/exynos5/config.cmake
@@ -34,8 +34,6 @@ endif()
add_sources(
DEP "KernelPlatExynos5"
CFILES
- src/arch/arm/machine/generic_timer.c
- src/plat/exynos5/machine/hardware.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/hikey/config.cmake b/src/plat/hikey/config.cmake
index 66ef6e0b2c2c0f1055f548d46ef2e6e3c649aced..f3205d083db864892445a85ceb03039acd1da001 100644
--- a/src/plat/hikey/config.cmake
+++ b/src/plat/hikey/config.cmake
@@ -73,7 +73,6 @@ endif()
add_sources(
DEP "KernelPlatformHikey"
CFILES
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/imx31/machine/hardware.c b/src/plat/imx31/machine/hardware.c
index 720da49e538e944a445d4c4911489609b16b982d..3773bbef62abd7a785b0c3da7226aaf804f7f9ab 100644
--- a/src/plat/imx31/machine/hardware.c
+++ b/src/plat/imx31/machine/hardware.c
@@ -29,54 +29,6 @@
#define L2_LINE_START(a) ROUND_DOWN(a, L2_LINE_SIZE_BITS)
#define L2_LINE_INDEX(a) (L2_LINE_START(a)>>L2_LINE_SIZE_BITS)
-timer_t *epit1 = (timer_t *) EPIT_PPTR;
-
-enum IPGConstants {
- IPG_CLK = 1,
- IPG_CLK_HIGHFREQ = 2,
- IPG_CLK_32K = 3
-};
-
-#define TIMER_CLOCK_SRC IPG_CLK_32K
-
-interrupt_t active_irq = irqInvalid;
-
-/* Configure EPIT1 as kernel preemption timer */
-BOOT_CODE void
-initTimer(void)
-{
- epitcr_t epitcr_kludge;
-
- /* Stop timer */
- epit1->epitcr = 0;
-
- /* Configure timer */
- epitcr_kludge.words[0] = 0; /* Zero struct */
- epitcr_kludge = epitcr_set_clksrc(epitcr_kludge, TIMER_CLOCK_SRC);
- /* Overwrite counter immediately on write */
- epitcr_kludge = epitcr_set_iovw(epitcr_kludge, 1);
- /* Reload from modulus register */
- epitcr_kludge = epitcr_set_rld(epitcr_kludge, 1);
- /* Enable interrupt */
- epitcr_kludge = epitcr_set_ocien(epitcr_kludge, 1);
- /* Count from modulus value on restart */
- epitcr_kludge = epitcr_set_enmod(epitcr_kludge, 1);
- epit1->epitcr = epitcr_kludge.words[0];
-
- /* Set counter modulus */
- epit1->epitlr = TIMER_RELOAD;
-
- /* Interrupt at zero count */
- epit1->epitcmpr = 0;
-
- /* Clear pending interrupt */
- epit1->epitsr = 1;
-
- /* Enable timer */
- epitcr_kludge = epitcr_set_en(epitcr_kludge, 1);
- epit1->epitcr = epitcr_kludge.words[0];
-}
-
static void cleanL2(void)
{
/* clean all ways */
diff --git a/src/plat/imx6/config.cmake b/src/plat/imx6/config.cmake
index dc87ced34ce37852d44cae0fc12f0462a64d07a8..9738178fc00d3d8cb96a8081136f711ee45935cd 100644
--- a/src/plat/imx6/config.cmake
+++ b/src/plat/imx6/config.cmake
@@ -34,6 +34,5 @@ add_sources(
DEP "KernelPlatImx6"
CFILES
src/arch/arm/machine/l2c_310.c
- src/arch/arm/machine/priv_timer.c
src/arch/arm/machine/gic_pl390.c
)
diff --git a/src/plat/imx7/config.cmake b/src/plat/imx7/config.cmake
index c486b60631a8a33f07b163e7f3eb5d448a751793..21269ae609036922bcd8778946eafe075169354f 100644
--- a/src/plat/imx7/config.cmake
+++ b/src/plat/imx7/config.cmake
@@ -27,7 +27,6 @@ endif()
add_sources(
DEP "KernelPlatImx7"
CFILES
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/omap3/machine/hardware.c b/src/plat/omap3/machine/hardware.c
index 18a36899b33042b6233f25de5f6cc83e40b71b2f..465e90f6cebeab46ba2ffddb8ed3b4f3613f8ccb 100644
--- a/src/plat/omap3/machine/hardware.c
+++ b/src/plat/omap3/machine/hardware.c
@@ -23,40 +23,6 @@
#define INTCPS_SYSCONFIG_SOFTRESET BIT(1)
#define INTCPS_SYSSTATUS_RESETDONE BIT(0)
-#define TIMER_INTERVAL_MS (CONFIG_TIMER_TICK_MS)
-
-#define TIOCP_CFG_SOFTRESET BIT(1)
-#define TCLR_AUTORELOAD BIT(1)
-#define TCLR_COMPAREENABLE BIT(6)
-#define TCLR_STARTTIMER BIT(0)
-#define TIER_MATCHENABLE BIT(0)
-#define TIER_OVERFLOWENABLE BIT(1)
-
-timer_t *timer = (timer_t *) TIMER_PPTR;
-
-BOOT_CODE void
-initTimer(void)
-{
- /* Configure gptimer9 as kernel timer */
- timer->cfg = TIOCP_CFG_SOFTRESET;
-
- while (!timer->tistat);
-
- maskInterrupt(/*disable*/ true, KERNEL_TIMER_IRQ);
-
- /* Set the reload value */
- timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD;
-
- /* Enables interrupt on overflow */
- timer->tier = TIER_OVERFLOWENABLE;
-
- /* Clear the read register */
- timer->tcrr = 0xFFFFFFFFUL - TIMER_RELOAD;
-
- /* Set autoreload and start the timer */
- timer->tclr = TCLR_AUTORELOAD | TCLR_STARTTIMER;
-}
-
BOOT_CODE void
initIRQController(void)
{
diff --git a/src/plat/tk1/config.cmake b/src/plat/tk1/config.cmake
index b24d67abbf17858ec68df3ac5185765df58bfb20..dcf1e65264be7bf2361ef1b0da1190cede0a767a 100644
--- a/src/plat/tk1/config.cmake
+++ b/src/plat/tk1/config.cmake
@@ -26,7 +26,6 @@ add_sources(
DEP "KernelPlatformTK1"
CFILES
src/plat/tk1/machine/smmu.c
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/tx1/config.cmake b/src/plat/tx1/config.cmake
index 574525647a58a6fada6decd1c979d58b8719f57e..ba376cea06a85e235fa313505bef5c8d5d417a45 100644
--- a/src/plat/tx1/config.cmake
+++ b/src/plat/tx1/config.cmake
@@ -26,7 +26,6 @@ endif()
add_sources(
DEP "KernelPlatformTx1"
CFILES
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/tx2/config.cmake b/src/plat/tx2/config.cmake
index 8b6307dee1fb58ac69e3b3b0269ee9a42aab4971..caf1097588ed9fec12a4b8541b0164bb7c097498 100644
--- a/src/plat/tx2/config.cmake
+++ b/src/plat/tx2/config.cmake
@@ -29,7 +29,6 @@ endif()
add_sources(
DEP "KernelPlatformTx2"
CFILES
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)
diff --git a/src/plat/zynq7000/config.cmake b/src/plat/zynq7000/config.cmake
index d3e34f53a3d6ca74038e4de4a775e6bb343def4a..def5904a06d68cdc077c60fcbc836ef6d4c392de 100644
--- a/src/plat/zynq7000/config.cmake
+++ b/src/plat/zynq7000/config.cmake
@@ -24,6 +24,5 @@ add_sources(
DEP "KernelPlatformZynq7000"
CFILES
src/arch/arm/machine/l2c_310.c
- src/arch/arm/machine/priv_timer.c
src/arch/arm/machine/gic_pl390.c
)
diff --git a/src/plat/zynqmp/config.cmake b/src/plat/zynqmp/config.cmake
index f6c916b53234aed81edc010d7f4e7f02271a05ce..3e7fb36acce3070aaec2657b01c609dd15691383 100644
--- a/src/plat/zynqmp/config.cmake
+++ b/src/plat/zynqmp/config.cmake
@@ -36,8 +36,6 @@ endif()
add_sources(
DEP "KernelPlatformZynqmp"
CFILES
- src/plat/zynqmp/machine/hardware.c
- src/arch/arm/machine/generic_timer.c
src/arch/arm/machine/gic_pl390.c
src/arch/arm/machine/l2c_nop.c
)